Christopher Hugh Combs

US Patent:

D456249, Apr 30, 2002

Filed:

Dec 29, 2000

Appl. No.:

29/134839

Inventors:

Tom E. Pearson - Beaverton OR
Christopher D. Combs - Portland OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

0903

US Classification:

D 9415

US Patent:

6472612, Oct 29, 2002

Filed:

Mar 30, 2001

Appl. No.:

09/822989

Inventors:

Arjang Fartash - Aloha OR
Raiyomand Aspandiar - Portland OR
Tom E. Pearson - Beaverton OR
Christopher D. Combs - Portland OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H05K 116

US Classification:

174260, 361761

Abstract:

A first strip and a second strip of metal are embedded on a first layer of a printed circuit board (PCB) to form a junction. The junction has a first strip tail and a second strip tail. The first strip and the second strip are made of different metals. A first trace and a second trace are fabricated on a second layer to extend the junction to a first trace pad and a second trace pad, respectively. The first and second traces are fabricated on a second layer. The first and second traces have a first end one and a second end one, respectively. The first end one is connected to the first strip using a first via and the second end one is connected to the second strip using a second via. A first wire is inserted to the first via and a second wire to the second via to measure the temperature of the PCB.

US Patent:

6501658, Dec 31, 2002

Filed:

Feb 16, 2001

Appl. No.:

09/788128

Inventors:

Tom E. Pearson - Beaverton OR
Arjang Fartash - Aloha OR
Christopher Combs - Portland OR
Raiyomand F. Aspandiar - Portland OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H05K 720

US Classification:

361709, 361698, 361704, 361712, 257718, 174 163

Abstract:

Shock absorbers or other dampening mechanisms are added to an assembly including a heatsink, a semiconductor device, and a board, to reduce shock and/or vibration induced relative motion between the heatsink and the board.

US Patent:

6523801, Feb 25, 2003

Filed:

Apr 4, 2001

Appl. No.:

09/826560

Inventors:

Christopher D. Combs - Portland OR
Jay D. Hall - Forest Grove OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

F16M 1300

US Classification:

248544

Abstract:

A compliant member configured to support a substrate during automated placement of components and a tray configured to support the compliant member and removably attach to a support member.

US Patent:

6651869, Nov 25, 2003

Filed:

Sep 21, 2001

Appl. No.:

09/957532

Inventors:

Raiyomand F. Aspandiar - Portland OR
Tom E. Pearson - Beaverton OR
Christopher Combs - Portland OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

B23K 3100

US Classification:

22818021, 22818022, 228216, 174263, 174264

Abstract:

A method of wave soldering a circuit board while avoiding reflow of a solder joint on the topside of the board from heat conducted from the solder wave through at least one via in the board in heat conducting relation with the topside solder joint, comprises subjecting the circuit board to a solder wave and absorbing heat being conducted from the solder wave through the at least one via with an endothermic material in the via hole which undergoes a heat absorbing reaction. The heat absorbing reaction of the endothermic material is preferably a phase change, such as melting. The melted endothermic material is retained in the via hole during wave soldering by capillary forces and a cap on the lower end of the via hole. A disclosed method of making the circuit board includes locating the endothermic material in the via hole by inserting a preform of the endothermic material into the via hole or hot dispensing the endothermic material into the via hole. An electronic board product for practicing the method/made by the method is also disclosed.

US Patent:

6691407, Feb 17, 2004

Filed:

Dec 13, 2001

Appl. No.:

10/020859

Inventors:

Tom E. Pearson - Beaverton OR
Christopher D. Combs - Portland OR
Arjang Fartash - Corvallis OR
Raiyomand Aspandiar - Portland OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H05K 332

US Classification:

29840, 29832, 29843, 156330, 1563069

Abstract:

A method to retain an assembled component on one side of a double-sided printed circuit board. In one embodiment, an adhesive body, in a solid state, is coupled with a component by disposing a coupling member extending from said component within a channel formed in said adhesive body such that the coupling member is engaged with at least one engaging member, said at least one engaging member each extending into said channel from an internal surface defining said channel. The component is then assembled onto a printed circuit board and adhered onto the printed circuit board via the adhesive body when the adhesive body is in semi-liquid state.

US Patent:

6700800, Mar 2, 2004

Filed:

Jun 14, 2002

Appl. No.:

10/173342

Inventors:

Christopher Combs - Portland OR
Arjang Fartash - Aloha OR
Tom E. Pearson - Beaverton OR
Raiyomand F. Aspandiar - Portland OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H02B 101

US Classification:

361825, 361807, 174260

Abstract:

A retainer for a circuit board and method for using the same are provided. In one embodiment, a circuit board assembly includes a circuit board, an electronic component, a plurality of electric contacts between the circuit board and the electronic component, and a retainer. The retainer has a first component secured to the circuit board and a second component secured to the electronic component. The retainer allows for movement of the electronic component in a first direction towards the circuit board while simultaneously preventing movement of the circuit board and the electronic component in a second direction away from one another when the electric contacts melt.

US Patent:

6734371, May 11, 2004

Filed:

Sep 28, 2001

Appl. No.:

09/964812

Inventors:

George Arrigotti - Portland OR
Tom E. Pearson - Beaverton OR
Raiyomand F. Aspandiar - Portland OR
Christopher D. Combs - Portland OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H05K 116

US Classification:

174260, 174252, 361760, 361702, 257706, 257718

Abstract:

An anchoring mechanism and method are provided for securing a component to a printed circuit board. The anchoring mechanism may include a loop, a first leg extending from the loop, and a second leg extending from the loop. The first leg may mount through a first hole of the printed circuit board and include a compressible section to compress when inserted into the first hole and to expand after passing through the first hole. The compressible section of the first leg may support solder between the anchoring mechanism and the first hole. Likewise, the second leg may mount through a second hole of the printed circuit board and include a compressible section to compress when inserted into the second hole and to expand after passing through the second hole. The compressible section of the second leg may support solder between the anchoring mechanism and the second hole.