Christopher W Pike

US Patent:

6410927, Jun 25, 2002

Filed:

Apr 21, 1999

Appl. No.:

09/296043

Inventors:

Christopher Lee Pike - Fremont CA

Assignee:

Advanced Micro Devices, Inc - Sunnyvale CA

International Classification:

H01L 2166

US Classification:

2504911, 356401

Abstract:

In a method for detecting defects in both processed and unprocessed (blank) wafers, a manufacturers identification mark is used to align wafers during inspection. The wafers, are subject to an initial scan under low magnification using an inspection tool and transferred to a high magnification analysis tool for more complete analysis. Prior to scanning, the wafers are oriented using the manufacturers identification mark. The wafers become misaligned when transferred between tools. Using the manufacturers identification mark, the wafers are reoriented and aligned. During scanning, defects in the wafer surface are located. The location of all defects are referenced to the location of the manufacturers identification mark. To easily find defects when a wafer is transferred from tool to tool, the manufacturers identification mark is located and, using a software algorithm, the wafer is oriented and aligned to the mark each time it is transferred and inspected. When placed in an analysis tool, the software algorithm aligns the wafer using the manufacturers identification mark.

US Patent:

6411378, Jun 25, 2002

Filed:

Jan 24, 2000

Appl. No.:

09/484655

Inventors:

Christopher Lee Pike - Fremont CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G01N 2100

US Classification:

3562375, 3562372, 3562374, 356394

Abstract:

There is provided an on-wafer apparatus and method for calibrating the sensitivity of a patterned wafer defect inspection tool during set-up which is used to detect defects on the surface of a semiconductor wafer during the stages of a fabrication process. A semiconductor wafer which is to be inspected for defects is provided. A calibration structure having known defects is introduced on a selected area of the semiconductor wafer which is to be inspected prior to, the inspection. The calibration structure includes a plurality of intentionally-introduced defects each being of a progressively smaller size dimension. Calibration of the sensitivity of the defect inspection tool is accomplished by scanning the semiconductor wafer with the calibration structure in order to determine the defects which are known to exist. As a result, there is provided a universal calibration method which allows an operator to know the smallest size defect which is detected by the defect inspection tool for each inspection in the fabrication process.

US Patent:

6420097, Jul 16, 2002

Filed:

May 2, 2000

Appl. No.:

09/562659

Inventors:

Christopher L. Pike - Fremont CA
Scott A. Bell - San Jose CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G03F 736

US Classification:

430313, 430317, 430322, 430328

Abstract:

An improved method of forming circuit structures having linewidths which are smaller than what is achievable by conventional UV lithographic techniques on ultra-thin resist layers is provided. The method includes a hardmask which is patterned using an ultra-thin resist layer and is then trimmed to reduce the width of the hardmask before etching the underlying gate conductive layer.

US Patent:

6475905, Nov 5, 2002

Filed:

May 21, 2001

Appl. No.:

09/861989

Inventors:

Ramkumar Subramanian - San Jose CA
Christopher L. Pike - Fremont CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 214763

US Classification:

438637, 438638, 438639

Abstract:

A method of manufacturing a semiconductor device includes forming a second barrier layer over a first level, forming a first dielectric layer over the second barrier layer, forming a second dielectric layer over the first dielectric layer, etching the first and second dielectric layers to form an opening through the first dielectric layer and the second dielectric layer, and depositing an anti-reflective material in the opening at an optimal thickness. The optimal thickness is determined by minimizing a standard deviation of reflectivity of the anti-reflective material. After etching the first dielectric layer, the anti-reflective material can then be completely removed and the second barrier layer is etched to expose the first level. The trench and a via are then filled with a conductive material to form a feature.

US Patent:

6642152, Nov 4, 2003

Filed:

Mar 19, 2001

Appl. No.:

09/812206

Inventors:

Scott Bell - San Jose CA
Anne Sanderfer - Campbell CA
Christopher Lee Pike - Vancouver WA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 21302

US Classification:

438717, 438514, 438558

Abstract:

The present invention relates to a system and a method for reducing the linewidth of ultra thin resist features. The present invention accomplishes this end by applying a densification process to an ultra thin resist having a thickness of less than about 2500 formed over a semiconductor structure. In one aspect of the present invention, the method includes providing a semiconductor substrate having a device film layer formed thereon. An ultra thin resist is then deposited over the device film layer. The ultra thin resist is patterned according to a desired structure or feature using conventional photolithography techniques. Following development, the ultra thin resist is implanted with a dopant. After the implantation is substantially completed, the device film layer is anisotropically etched.

US Patent:

6796517, Sep 28, 2004

Filed:

Mar 9, 2000

Appl. No.:

09/522226

Inventors:

Christopher Lee Pike - Fremont CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

B05B 114

US Classification:

239557, 239554, 239567, 239548, 427240

Abstract:

A wedge-shaped nozzle for dispensing fluids onto a round surface is disclosed. The nozzle dispenses the fluid with a generally uniform volume of fluid per unit area of the round surface to achieve rapidly a uniform thickness of applied fluid on the round surface. The wedge-shaped nozzle has orifices of equal size disposed on its bottom through which the fluid is dispensed. The orifices are disposed along arcs, with increasing numbers of orifices on the arcs at greater and greater distances of the arcs from the apex of the wedge-shaped nozzle. The numbers of the orifices on each arc are proportional to the area of an annular region determined by the arcs.

US Patent:

62574469, Jul 10, 2001

Filed:

Feb 18, 1999

Appl. No.:

9/252429

Inventors:

Christopher L. Pike - Fremont CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

B67D 508

US Classification:

222 52

Abstract:

A liquid dispenser system uses a container that has a reservoir in the bottom of the container and an opening in the top of the container. The dispenser has a cover, which covers the opening in the container and a draw tube that extends from the cover into the reservoir. An end of the draw tube in the reservoir has a plurality of inlets. The average cross-section of the reservoir below the inlets of the draw tube is less than one fourth of the average cross-section of the rest of the container. As a result of the difference in average cross-sections, the invention reduces the amount of liquid that the dispenser is not able to dispense, which reduces wasted liquid. In a production environment, the reduction in waste results in a reduction in down time.

US Patent:

59406518, Aug 17, 1999

Filed:

Feb 13, 1998

Appl. No.:

9/023853

Inventors:

Christopher Lee Pike - Fremont CA
David Ashby Steele - Sunnyvale CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G03D 500

US Classification:

396604

Abstract:

A drip catching apparatus includes a trough 2 formed by a sidewall 26 and a drip catching surface 28 to prevent excess drops of a photoresist developer solution from dripping onto a semiconductor wafer 8 in a photoresist development cup 4. One or more holes 30 may be provided to drain the photoresist developer solution received by the drip trough 2.