Christopher T Riddle

US Patent:

6389067, May 14, 2002

Filed:

Jun 10, 1999

Appl. No.:

09/329777

Inventors:

Christopher C. Riddle - San Diego CA
Jeffrey A. Levin - San Diego CA

Assignee:

Qualcomm, Inc. - San Diego CA

International Classification:

H04B 1700

US Classification:

375225, 375150

Abstract:

A Wireless Code Division Multiple Access method and apparatus for determining the transmitted rate of a voice/data signal from a mobile station to a Base Station. Variable rate vocoders transmit voice at one of several predetermined frame rates. The receiver determines the transmitted rate based on one of several frame parameters. One of the parameters is received frame energy. The received frame energy is measured over the length of the relevant portion of the frame. Energy is measured over the half of the frame that can only contain energy if a full rate frame is sent. If the energy measured exceeds a threshold, then full rate is indicated. Else, energy is measured over the fourth of a frame that can only contain energy if a half rate frame is sent. If the energy exceeds a threshold, then half rate is indicated. The procedure is repeated for quarter and eighth rates.

US Patent:

6483817, Nov 19, 2002

Filed:

Oct 14, 1998

Appl. No.:

09/172332

Inventors:

Franklin Antonio - Del Mar CA
Christopher C. Riddle - San Diego CA

Assignee:

Qualcomm Incorporated - San Diego CA

International Classification:

H04J 100

US Classification:

370328, 370335, 370342, 370537

Abstract:

A base station architecture splits modem functionality into modulator and demodulator entities, each configured to handle multiple telephone calls. A high-speed digital bus with associated routing elements connects multiple-channel (i. e. , multiuser) modulator and demodulator elements. The modulator and demodulator elements may be physically separated, residing on different cards, and even different shelves, within the base station. On each modulator card, the outputs of multiple modulators may be combined by digitally upconverting the output of each modulator by a different amount and summing the results.

US Patent:

6600792, Jul 29, 2003

Filed:

Jun 26, 1998

Appl. No.:

09/105532

Inventors:

Franklin P. Antonio - Del Mar CA
Walid Hamdy - San Diego CA
Nitin Kasturi - Los Gatos CA
Christopher C. Riddle - San Diego CA
David P. Oses - San Diego CA

Assignee:

Qualcomm Incorporated - San Diego CA

International Classification:

H04L 2549

US Classification:

375297, 330149, 455126

Abstract:

A predistortion technique for high power amplifiers includes an adaptive predistortion algorithm that operates independently of data samples to write a set of complex gain values, or predistortion parameters, to a lookup table. The algorithm may be processor-driven. The gain values are taken from the lookup table and multiplied by a complex digital baseband waveform. The gain values may first be subjected to interpolation. The downconverted output of the amplifier is measured to gauge the efficacy of the predistortion. Based on the effect of the predistortion upon the ratio of in-band power to out-of-band power, decisions are made on the set of predistortion parameters for the next iteration of the algorithm. The algorithm runs continuously, perturbing parameters and adapting the predistortion functions accordingly in an effort to continually reflect instantaneous amplitude-modulation and phase-modulation relationships that may change over time with temperature variation or component aging.

US Patent:

6650187, Nov 18, 2003

Filed:

Aug 29, 2002

Appl. No.:

10/233246

Inventors:

Christopher Riddle - San Diego CA
Serguei A. Glazko - San Diego CA

Assignee:

Qualcomm, Incorporated - San Diego CA

International Classification:

H03L 700

US Classification:

331 17

Abstract:

A phase lock loop apparatus and method is disclosed. A typical apparatus includes a demodulator receiving a phase error signal from a comparator at a chip rate and providing a phase error update over a symbol period from the phase error signal wherein the chip rate is higher than the symbol rate. A phase discriminator produces a phase error output at the symbol rate from the phase error update based upon a signal modulation type. A loop filter produces one or more phase estimate parameters at a symbol rate from the phase error output and a numerically controlled oscillator (NCO) extrapolates a phase reference at a chip rate from the one or more phase estimate parameters at a symbol rate. The comparator produces the phase error signal to the demodulator based upon the phase reference and an incoming signal.

US Patent:

6650873, Nov 18, 2003

Filed:

Mar 16, 2001

Appl. No.:

09/809836

Inventors:

Jiangxin Chen - San Diego CA
Christopher Riddle - San Diego CA
Serguei Glazko - San Diego CA

Assignee:

Qualcomm, Incorporated - San Diego CA

International Classification:

H04Q 720

US Classification:

455 69, 455458, 455574, 455522, 370335, 370329

Abstract:

A wireless communication device performance, such as standby time, is improved by adaptively allocating surplus system resources to change quick paging channel parameters at the system, such a system being for example, a base station. Adaptively adjusting the quick paging channel parameters allows available base station resources to be allocated to the quick paging channel, thereby enabling the wireless communication device to demodulate the quick paging channel more reliably. Parameters such as the number of quick paging channels, the data rate used by the paging channel, and the quick paging channel transmit power level are weighed and adjusted.

US Patent:

7590164, Sep 15, 2009

Filed:

Jan 19, 2001

Appl. No.:

09/766558

Inventors:

Quaeed Motiwala - San Diego CA, US
Christopher C. Riddle - San Diego CA, US
Luca Blessent - San Diego CA, US
Shih-Yi Yeh - Santee CA, US
Robert J. Fuchs - San Diego CA, US

Assignee:

QUALCOMM Incorporated - San Diego CA

International Classification:

H04B 1/00

US Classification:

375142, 375143, 375150, 375152, 375326

Abstract:

The frame of data is partitioned into a plurality of portions of data symbols. A plurality of channel elements is assigned to demodulate data symbols of correspondingly the plurality of portions of data symbols. The number of the plurality of portions of data symbols is higher in a case at high data rate than a case at low data rate.

US Patent:

7664519, Feb 16, 2010

Filed:

Dec 30, 2003

Appl. No.:

10/750302

Inventors:

Chih-Ping Hsu - San Diego CA, US
Hyukjun Oh - Santa Clara CA, US
Christopher C. Riddle - San Diego CA, US
Nitin Kasturi - Los Gatos CA, US

Assignee:

QUALCOMM Incorporated - San Diego CA

International Classification:

H04B 1/00
H04B 1/04
H04Q 7/20

US Classification:

455522, 455 69, 4551271, 455 6711

Abstract:

Techniques are provided to control the transmit power for data transmission on multiple transport channels having different signal quality (SIR) targets. A single SIR target is maintained for all transport channels, and this SIR target is adjusted based only on active transport channels. For each update interval, a data processor processes at least one data block received in the current update interval on at least one of the transport channels and provides the status of each received data block. A controller increases the SIR target based on an up step if any received data block is erased and decreases the SIR target based on a down step if all received data blocks are good. If any received data block is erased, the down step used to adjust the SIR target may be set to the smallest down step size required by all transport channels with erased data blocks.

US Patent:

7812582, Oct 12, 2010

Filed:

Sep 14, 2006

Appl. No.:

11/532000

Inventors:

Lew G. Chua-Eoan - Carlsbad CA, US
Boris Andreev - San Diego CA, US
Christopher C. Riddle - San Diego CA, US
Chunlei Shi - Poway CA, US
Justin Joseph Rosen Gagne - San Diego CA, US
Seong-Ook Jung - Goyang-Si, KR
Thomas R. Toms - Dripping Springs TX, US

Assignee:

QUALCOMM Incorporated - San Diego CA

International Classification:

G05F 1/40

US Classification:

323282

Abstract:

A device is disclosed that includes a first pin to supply power to a first power domain of an integrated circuit, a second pin to supply power to a second power domain of the integrated circuit, a switching regulator and a controller. The switching regulator is coupled to the first pin to provide a first regulated power supply to the first power domain and is coupled to the second pin to provide a second regulated power supply to the second power domain. The controller is coupled to the first pin and to the second pin to selectively reduce current flow to at least the second pin during a low power event.