Chuan Chang

US Patent:

43148557, Feb 9, 1982

Filed:

Dec 17, 1979

Appl. No.:

6/104379

Inventors:

Chuan C. Chang - Berkeley Heights NJ
Jitendra Kumar - Bridgewater NJ

Assignee:

Bell Telephone Laboratories, Incorporated - Murray Hill NJ

International Classification:

B08B 308
B08B 310

US Classification:

134 3

Abstract:

Contaminants that accumulate on test probes utilized to contact aluminum pads on integrated circuit chips cause the probe resistance to become unacceptably high. As disclosed herein, the contaminants (predominantly a mixture of aluminum and aluminum oxide) are substantially removed by immersing the probes in boiling water. Adding small quantities of phosphoric and/or hydrofluoric acids to the water further improves the cleaning action.

US Patent:

41446348, Mar 20, 1979

Filed:

Jun 28, 1977

Appl. No.:

5/810771

Inventors:

Chuan C. Chang - Berkeley Heights NJ
Robert P. H. Chang - Warren NJ
James J. Coleman - Plainfield NJ
Tan T. Sheng - Berkeley Heights NJ

Assignee:

Bell Telephone Laboratories, Incorporated - Murray Hill NJ

International Classification:

B01J 1700

US Classification:

29571

Abstract:

A method of fabricating gallium arsenide MOS devices with improved stoichiometric and electrical properties is disclosed. The device includes a gallium arsenide substrate overlaid with a native oxide and an aluminum oxide layer. The device is fabricated using a plasma oxidizing process.

US Patent:

43240380, Apr 13, 1982

Filed:

Nov 24, 1980

Appl. No.:

6/209755

Inventors:

Chuan C. Chang - Berkeley Heights NJ
James A. Cooper - Warren NJ
Dawon Kahng - Bridgewater Township, Somerset County NJ
Shyam P. Murarka - New Providence NJ

Assignee:

Bell Telephone Laboratories, Incorporated - Murray Hill NJ

International Classification:

H01L 2128

US Classification:

29571

Abstract:

A method for making a MOSFET device (20) in a semiconductor body (10) includes the step of forming source and drain contact electrodes (12. 1, 12. 2) prior to growth of the gate oxide (10. 3) and after formation of a high conductivity surface region (10. 5). The exposed mutually opposing sidewall edges of each of the contact electrodes (12. 1, 12. 2) are coated with a sidewall silicon dioxide layer (15. 1, 15. 2), and the then exposed surface of the semiconductor body (10) between these sidewalls is etched to depth beneath the high conductivity surface region (10. 5) in order to separate it into the source and drain regions (10. 1, 10. 2). Formation of the high conductivity region may be omitted by using Schottky barrier or impurity doped material for the contact electrodes (12. 1, 12. 2).

US Patent:

40267415, May 31, 1977

Filed:

Jun 16, 1976

Appl. No.:

5/696563

Inventors:

Chuan Chung Chang - Berkeley Heights NJ
Paul H. Citrin - Westfield NJ
Bertram Schwartz - Westfield NJ

Assignee:

Bell Telephone Laboratories, Incorporated - Murray Hill NJ

International Classification:

B29C 1708
C25D 1100

US Classification:

156628

Abstract:

A technique for preparing stoichiometric group III-V compound semiconductor surfaces involves a repetitive anodizing and etching sequence in an aqueous solution of appropriate pH and a basic solution, respectively. Surfaces treated in the described manner evidence a correct surface stoichiometry and minimum carbon contamination.

US Patent:

41795342, Dec 18, 1979

Filed:

May 24, 1978

Appl. No.:

5/909024

Inventors:

Chuan C. Chang - Berkeley Heights NJ
Felix Ermanis - Summit NJ
Robert J. McCoy - Chatham NJ
Shohei Nakahara - North Plainfield NJ
Tan T. Sheng - Millington NJ

Assignee:

Bell Telephone Laboratories, Incorporated - Murray Hill NJ

International Classification:

H01L 2348

US Classification:

427 89

Abstract:

A semiconductor device with a low resistance ohmic contact, strongly adherent to the n-type surface of a body (11) of Group III-V compound semiconductor is obtained by a process including the sequential deposition of gold (13), tin (14) and gold (15) at a surface temperature of less than 200 degrees C followed by a heat treatment in a nonoxidizing atmosphere. This process has shown particular advantage when applied to aluminum containing compound semiconductors (e. g. , gallium aluminum arsenide). For such use an initial deposition of aluminum (16) has proven particularly successful in producing consistently low resistance ohmic contacts. The invention has been used in the production of light emitting diodes.

US Patent:

46239120, Nov 18, 1986

Filed:

Dec 5, 1984

Appl. No.:

6/678569

Inventors:

Chuan C. Chang - Warren NJ
Dawon Kahng - Bridgewater NJ
Avid Kamgar - Millington NJ
Louis C. Parrillo - Warren NJ

Assignee:

AT&T Bell Laboratories - Murray Hill NJ

International Classification:

H01L 2934

US Classification:

357 54

Abstract:

A semiconductor integrated circuit includes a nitrided silicon dioxide layer typically 50 to 400 Angstroms thick located on a semiconductor medium. The nitrided layer is an original silicon dioxide layer that has been nitrided at its top surface, as by rapid (flash) heating in ammonia to about 1250 degrees C. , in such a way that the resulting nitrided silicon dioxide layer is essentially a compound layer of silicon nitroxide on silicon dioxide in which the atomic concentration fraction of nitrogen falls from a value greater than 0. 13 at the top surface of the compound layer to a value of about 0. 13 within 30 Angstroms or less beneath the top surface, and advantageously to values of less than about 0. 05 everywhere at distances greater than about 60 Angstroms or less beneath the top surface, except that the nitrogen fraction can rise to as much as about 0. 10 in the layer at distances within about 20 Angstroms from the interface of the nitrided layer and the underlying semiconductor medium.