Chung W Lee

US Patent:

6534616, Mar 18, 2003

Filed:

Apr 17, 2001

Appl. No.:

09/836815

Inventors:

Chung J. Lee - Fremont CA
Hui Wang - Fremont CA
Giovanni Antonio Foggiato - Morgan Hill CA

Assignee:

Quester Technology, Inc. - Fremont CA

International Classification:

C08G 7724

US Classification:

528 42, 528 31, 528 43, 528397, 528401, 25218211, 438780

Abstract:

Fluorinated chemical precursors, methods of manufacture, polymer thin films with low dielectric constants, and integrated circuits comprising primarily of sp CâF and some hyperconjugated sp CâF bonds are disclosed in this invention. Precursors are disclosed for creating fluorinated silanes and siloxanes, and fluorinated hydrocarbon polymers. Thermal transport polymerization (TP), chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), high density PECVD (HDPCVD), photon assisted CVD (PACVD), and plasma-photon assisted (PPE) CVD and PPETP of these chemicals provides thin films with low dielectric constants and high thermal stabilities for use in the manufacture of integrated circuits.

US Patent:

6663973, Dec 16, 2003

Filed:

Dec 20, 1999

Appl. No.:

09/468378

Inventors:

Chung J. Lee - Fremont CA
Hui Wang - Fremont CA
Giovanni Antonio Foggiato - Morgan Hill CA

Assignee:

Canon, USA, Inc. - Lake Success NY

International Classification:

B32B 904

US Classification:

428447, 427489, 427515, 428450

Abstract:

Intermetal dielectric (IMD) and interlevel dielectric (ILD) that have dielectric constants (K) ranging from 2. 0 to 2. 6 are prepared from plasma or photon assisted CVD (PACVD) or transport polymerization (TP). The low K dielectric (LKD) materials are prepared from PACVD or TP of some selected siloxanes and F-containing aromatic compounds. The thin films combine barrier and adhesion layer functions with low dielectric constant functions, thus eliminating the necessity for separate adhesion and barrier layers, and layers of low dielectric constant. The LKD materials disclosed in this invention are particularly useful for 0. 18 m ICs, or when copper is used as conductor in future ICs.

US Patent:

6797343, Sep 28, 2004

Filed:

Dec 20, 2001

Appl. No.:

10/028198

Inventors:

Chung J. Lee - Fremont CA

Assignee:

Dielectric Systems, Inc. - Fremont CA

International Classification:

B32B 2728

US Classification:

428 11, 428421, 428500, 526244, 526251

Abstract:

New precursors and processes are disclosed for making fluorinated, low dielectric constant â thin films that have higher dimensional stability and are more rigid than fluorinated poly (para-xylylenes). The fluorinated, low dielectric constant thin films can be prepared from reactions of an ethylenic-containing precursor with benzocyclobutane-, biphenyl- and/or dieneone-containing precursors. The fluorinated, low dielectric constant thin films are useful for fabrications of future 0. 13 m integrated circuits (ICs). Using fluorinated, low-dielectric constant thin films prepared according to this invention, the integrity of the dielectric, copper (Cu) and barrier metals, such as Ta, can be kept intact; therefore improving the reliability of the IC.

US Patent:

6825303, Nov 30, 2004

Filed:

Feb 26, 2001

Appl. No.:

09/795217

Inventors:

Chung J. Lee - Fremont CA

Assignee:

Dielectric Systems, Inc. - Fremont CA

International Classification:

C08F 1220

US Classification:

526242, 5263481, 526346, 528244, 528401

Abstract:

New precursors and processes to generate fluorinated poly(para-xylylenes) (âPPXâ) and their chemically modified films suitable for fabrications of integrated circuits (âICsâ) of 0. 15 m are disclosed. The films so prepared have low dielectric constants (âââ) and are able to keep the integrity of the dielectric, Cu, and the barrier metal, such as Ta. Hence, the reliability of ICs can be assured.

US Patent:

6858888, Feb 22, 2005

Filed:

Nov 22, 2002

Appl. No.:

10/302777

Inventors:

Amit Lal - Ithaca NY, US
Max G. Lagally - Madison WI, US
Chung Hoon Lee - Ithaca NY, US
Paul Powell Rugheimer - Madison WI, US

Assignee:

Wisconsin Alumni Research Foundation - Madison WI

International Classification:

H01L029/80
H01L031/112

US Classification:

257276, 257 12, 257 14, 257 99, 257414

Abstract:

A suspended semiconductor film is anchored to a substrate at at least two opposed anchor positions, and film segments are deposited on the semiconductor film adjacent to one or more of the anchor positions to apply either tensile or compressive stress to the semiconductor film between the film segments. A crystalline silicon film may be anchored to the substrate and have tensile stress applied thereto to reduce the lattice mismatch between the silicon and a silicon-germanium layer deposited onto the silicon film. By controlling the level of stress in the silicon film, the size, density and distribution of quantum dots formed in a high germanium content silicon-germanium film deposited on the silicon film can be controlled.

US Patent:

6874699, Apr 5, 2005

Filed:

Oct 15, 2002

Appl. No.:

10/271250

Inventors:

Bradley James Larson - Madison WI, US
Chung Hoon Lee - Ithaca NY, US
Amit Lal - Ithaca NY, US
Max G. Lagally - Madison WI, US

Assignee:

Wisconsin Alumni Research Foundation - Madison WI

International Classification:

B05B001/08

US Classification:

2391021, 2391022, 239 86, 2395891, 422100, 422930, 73 174, 7386332, 7386401, 7386422, 347 46, 347 47

Abstract:

Devices and methods for depositing fluids on substrates in patterns of spots, lines, or other features use a nozzle, which is preferably configured similarly to a micropipette, having a piezoelectric crystal or other ultrasonic actuator coupled to one of its sides. The nozzle may be charged via capillary action by dipping it into a well containing the fluid to be deposited, and may then be positioned over a desired area of a substrate, at which point activation of the ultrasonic actuator at ultrasonic frequencies will eject the fluid onto the substrate. The needle may subsequently be dipped into a well of rinsing fluid for cleaning. Spots or lines on the order of 5 micrometers width may be generated, making the invention particularly suitable for use in biological applications such as microarray production and in microelectronics applications such as the printing of organic circuitry.

US Patent:

6881447, Apr 19, 2005

Filed:

Apr 4, 2002

Appl. No.:

10/116724

Inventors:

Chung J. Lee - Fremont CA, US
Atul Kumar - Fremont CA, US

Assignee:

Dielectric Systems, Inc. - Fremont CA

International Classification:

C23C016/56

US Classification:

4272556, 42725511, 42725521, 4272481, 427309, 526346, 118724, 118725

Abstract:

Preparation methods and stabilization processes for low k polymers that consist of spC—X and HC-spC—X bonds. A preparation method is achieved by controlling the substrate temperature and feed rate of the polymer precursors. One stabilization process includes a post annealing of as-deposited polymer films under the presence of hydrogen under high temperatures. The reductive annealing of these films is conducted at temperatures from −20 C. to −50 C. to +20 C. to +50 C. of their Reversible Crystal Transformation (“CRT”) temperatures, then quenching the resulting films to −20 C. to −50 C. below their “CRT” temperatures. The reductive annealing is conducted before the as-deposited film was removed from a deposition system and still under the vacuum. “Re-stabilization” processes of polymer surfaces that are exposed to reactive plasma etching are also disclosed; thus, further coating by barrier metal, cap layer or etch-stop layer can be safely applied.

US Patent:

6962871, Nov 8, 2005

Filed:

Mar 31, 2004

Appl. No.:

10/816205

Inventors:

Chung J. Lee - Fremont CA, US
Atul Kumar - Santa Clara CA, US

Assignee:

Dielectric Systems, Inc. - Fremont CA

International Classification:

H01L021/4763

US Classification:

438624, 438628

Abstract:

An integrated circuit including a composite polymer dielectric layer formed on a substrate is disclosed, wherein the composite polymer dielectric layer includes a first silane-containing layer formed on the substrate, wherein the first silane-containing layer is formed at least partially from an organosilane material, a polymer dielectric layer formed on the first silane-containing layer, and a second silane-containing layer formed on the polymer dielectric layer. In some embodiments, the first silane-containing layer and second silane-containing layer may be formed from organosilane materials having at least one unsaturated bond capable of free radical polymerization. Systems and methods for making the disclosed integrated circuits are also provided.