Clifford N D Duong

US Patent:

6789036, Sep 7, 2004

Filed:

Jan 22, 2002

Appl. No.:

10/053973

Inventors:

Kenneth Ostrom - Palos Verdes Estates CA
Tim Ng - Monterey Park CA
Clifford Duong - Fountain Valley CA

Assignee:

Primarion, Inc. - Tempe AZ

International Classification:

G01D 300

US Classification:

702108, 323313, 324771, 363124

Abstract:

A transient current generator for testing microelectronic power regulator systems is provided. The current generator includes a current source and one or more transistors to provide current or sink current to a microelectronic power delivery system. The generator may be used to test a microprocessor power delivery system by replacing the microprocessor with one or more of the generators of the present invention.

US Patent:

6809504, Oct 26, 2004

Filed:

Mar 21, 2002

Appl. No.:

10/104199

Inventors:

Benjamim Tang - Hawthorne CA
Ken Ostrom - Palos Verdes Estates CA
Tim Ng - Monterey Park CA
Clifford Duong - Fountain Valley CA

Assignee:

Primarion, Inc. - Tempe AZ

International Classification:

G05F 156

US Classification:

323274, 323284, 363 16

Abstract:

A dual loop regulator is configured for improved regulation of a supply voltage for a dynamic load based on the magnitude of changes in the load voltage. An exemplary dual loop regulator comprises a primary voltage regulator configured within a linear loop and a secondary voltage regulator configured within a wideband, non-linear loop. The primary voltage regulator is configured for providing a well-controlled, regulated output voltage to the dynamic load, and for addressing small changes in the output voltage. The secondary voltage regulator is configured for sensing undervoltage and overvoltage conditions at the dynamic load, and for addressing changes greater than a predetermined threshold voltage. To facilitate loop stability, secondary voltage regulator can be configured within the wideband, non-linear loop to have a small gain for small changes, a larger gain for large changes, and/or a substantially finite storage capability such that any large signal oscillations will not be sustained.

US Patent:

6931083, Aug 16, 2005

Filed:

May 26, 2000

Appl. No.:

09/579596

Inventors:

Lloyd F. Linder - Agoura Hills CA, US
Clifford N. Duong - Fountain Valley CA, US
Don C. Devendorf - Carlsbad CA, US

Assignee:

TelASIC Communications, Inc. - El Segundo CA

International Classification:

H04L027/08

US Classification:

375345

Abstract:

A signal processing system and method. The inventive system includes a first circuit for distributing an input signal between two or more channels in a current mode of operation. A second circuit is disposed in each of the channels for processing the input signal and providing an output signal in response thereto. A third circuit is provided to combine the signals output by the processing circuit. A fourth circuit is included for controlling the first and the third circuits. In a specific illustrative embodiment, the system further includes a radio frequency stage for downconverting a received signal and providing the input signal in response thereto. In the specific embodiment, the first circuit includes a mixing circuit. The mixing circuit includes Gilbert cells and circuitry for providing automatic gain control for each of the channels individually. The Gilbert cells and the automatic gain control circuitry are driven by a transconductance amplifier and therefore operate in a current mode.

US Patent:

6975494, Dec 13, 2005

Filed:

May 15, 2002

Appl. No.:

10/147156

Inventors:

Benjamim Tang - Hawthorne CA, US
Kenneth Ostrom - Palos Verdes Estates CA, US
Timothy Ng - Monterey Park CA, US
Keith Nelson Bassett - Torrance CA, US
Nicholas Robert Steffen - Redondo Beach CA, US
Clifford Duong - Fountain Valley CA, US
William Pohlman - Phoenix AZ, US
Robert Carroll - Andover MA, US

Assignee:

Primarion, Inc. - Tempe AZ

International Classification:

H02H003/00
G05F001/44

US Classification:

361 64, 323272

Abstract:

A method, apparatus, and system for providing operating power and transient suppression power to a microelectronic device are disclosed. The system includes a primary regulator to supply nominal operating power and to respond to relatively slow transient events and a transient suppression regulator to respond to fast transient power events. The system also includes a sense circuit to detect when a transient event occurs and to send a signal to the transient suppression regulator to supply or sink current to the load in response to a sensed transient power event.

US Patent:

7391192, Jun 24, 2008

Filed:

Aug 31, 2001

Appl. No.:

09/945187

Inventors:

Ken Ostrom - Palos Verdes Estates CA, US
Tim Ng - Monterey Park CA, US
Clifford Duong - Fountain Valley CA, US

Assignee:

Primarion, Inc. - Phoenix AZ

International Classification:

G05F 1/56

US Classification:

323274, 323284, 363 16

Abstract:

A device for providing power to suppress transient load demands and a system including the device are disclosed. The device includes a sense circuit to detect when a transient event occurs and one or more transistors configured to supply or sink current to the load. The system may include a second power regulator configured to respond to fast transient power demands. In this case, a first power regulator supplies power to the load and responds to slow transient events, while the second regulator responds only to fast transient events.

US Patent:

7616456, Nov 10, 2009

Filed:

Jul 3, 2006

Appl. No.:

11/480718

Inventors:

Ken Ostrom - Verdes Estates CA, US
Tim Ng - Monterey Park CA, US
Clifford Duong - Fountain Valley CA, US

Assignee:

Primarion Corporation - Torrance CA

International Classification:

H02M 3/335

US Classification:

363 17, 323266

Abstract:

A device for providing power to suppress transient load demands and a system including the device are disclosed. The device includes a sense circuit to detect when a transient event occurs and one or more transistors configured to supply or sink current to the load. The system may include a second power regulator configured to respond to fast transient power demands. In this case, a first power regulator supplies power to the load and responds to slow transient events, while the second regulator responds only to fast transient events.

US Patent:

20070075692, Apr 5, 2007

Filed:

Oct 3, 2006

Appl. No.:

11/538218

Inventors:

Kenneth Ostrom - Palos Verdes CA, US
Benjamin Tang - Rancho Palos Verdes CA, US
Tim Ng - Monterey Park CA, US
Clifford Duong - Fountain Valley CA, US

International Classification:

G05F 1/00

US Classification:

323274000

Abstract:

Methods and apparatus for regulating power supply according to various aspects of the present invention operate in conjunction with an electronic system configured to interface with a primary voltage regulator. The electronic system comprises a load configured to receive supply current from the primary voltage regulator and a secondary voltage regulator. The secondary voltage regulator includes at least one current source coupled to the load and is configured to provide current to the load. The secondary voltage regulator further comprises a control circuit coupled to the current source and the load, which determines a current demand for the load exceeding the supply current received from the primary voltage regulator, and adjusts the current provided to the load by the current source according to the current demand.

US Patent:

6400229, Jun 4, 2002

Filed:

Feb 22, 2001

Appl. No.:

09/790796

Inventors:

Kelvin T. Tran - Carson CA
Clifford Duong - Fountain Valley CA
Michael N. Farias - San Diego CA
Don C. Devendorf - Carlsbad CA
Lloyd F. Linder - Agoura Hills CA

Assignee:

Raytheon Company - Lexington MA

International Classification:

H03F 122

US Classification:

330311, 330 98

Abstract:

A low noise, low distortion radio frequency amplifier which includes a bootstrap design to minimize intermodulation distortion while simultaneously achieving low noise and wide bandwidth. In the illustrative embodiment, the invention includes a first circuit for receiving an input signal; a second circuit for amplifying the input signal using a transistor Q ; and a third circuit for regulating a rate of change of voltage across the transistor Q such that the rate of voltage change is zero. The third circuit includes a transistor Q connected to the transistor Q in cascode. In the specific illustrative embodiment, the third circuit further includes two diodes D and D used to modulate the voltage at the input of the transistor Q in proportion to the voltage modulation at the input of the transistor Q. In the illustrative embodiment, the second circuit includes a transistor Q connected in cascade to the transistor Q. In the specific illustrative embodiment, the invention further includes a fourth circuit for regulating a rate of change of voltage across the transistor Q such that the rate of voltage change is zero.