Clifford W Meyers

US Patent:

6667519, Dec 23, 2003

Filed:

Jul 20, 2001

Appl. No.:

09/909718

Inventors:

William D. Farwell - Thousand Oaks CA
Lloyd F. Linder - Agoura Hills CA
Clifford W. Meyers - Rancho Palos Verdes CA
Michael D. Vahey - Manhattan Beach CA

Assignee:

Raytheon Company - Lexington MA

International Classification:

H01L 2976

US Classification:

257369, 257370

Abstract:

A mixed technology microcircuit including a first circuit fabricated on a first layer with a first technology and a second circuit fabricated on a second layer with a second technology. In the illustrative embodiment, the first circuit is fabricated with silicon germanium (SiGe) technology and the second circuit is fabricated with complementary metal-oxide semiconductor (CMOS) technology. In an illustrative application, the first circuit includes a high-speed data receiver and a high-speed data transmitter. In the illustrative implementation, the data receiver includes a line receiver, a data and clock recovery circuit, and a demultiplexer and the data transmitter includes a multiplexer, a data and clock encoding circuit, and a line driver.

US Patent:

6768442, Jul 27, 2004

Filed:

Oct 25, 2002

Appl. No.:

10/280680

Inventors:

Clifford W. Meyers - Rancho Palos Verdes CA
Lloyd F. Linder - Agoura Hills CA
Kenneth A. Essenwanger - Walnut CA
Don C. Devendorf - Carlsbad CA
Erick M. Hirata - Torrance CA
William W. Cheng - Redondo Beach CA

Assignee:

Raytheon Company - Lexington MA

International Classification:

H03M 136

US Classification:

341158, 341159, 327 65, 327 89

Abstract:

An Advanced Digital Antenna Module (ADAM) for receiving and exciting electromagnetic signals. The ADAM ASIC integrates a complete receiver/exciter function on a monolithic SiGe device, enabling direct digital-to-RF (Radio Frequency) and RF-to-digital transformations. The invention includes an improved analog-to-digital converter (ADC) ( ) with a novel active offset method for comparators. The novel ADC architecture ( ) includes a first circuit ( ) for receiving an input signal; a second circuit ( ) for setting a predetermined number of thresholds using a predetermined number of preamplifiers ( ) with weighted unit current sources ( ) in each of the preamplifier outputs; and a third circuit ( ) for comparing the input to the thresholds. In the preferred embodiment, the ADC ( ) includes trimmable current sources ( ). The ADC ( ) of the present invention also includes an improved comparator circuit ( ).

US Patent:

6949978, Sep 27, 2005

Filed:

Oct 17, 2003

Appl. No.:

10/688368

Inventors:

Reza Tayrani - Marina Del Rey CA, US
Clifford W. Meyers - Rancho Palos Verdes CA, US

Assignee:

Raytheon Company - Waltham MA

International Classification:

H03F003/217

US Classification:

330251, 330207 A

Abstract:

An efficient broadband amplifier. The amplifier includes a mechanism for amplifying an input signal via a high-speed switch and providing an amplified signal in response thereto. Another mechanism filters the amplified signal via common mode rejection and provides an output signal in response thereto. In a specific embodiment, the mechanism for filtering includes a first mechanism for separating an input signal into plural intermediate signals. The mechanism for amplifying includes a second mechanism for amplifying the plural intermediate signals via one or more high-speed switches and providing plural amplified signals in response thereto. The mechanism for filtering further includes a third mechanism for employing common mode rejection to filter the plural amplified signals, yielding a single output signal in response thereto.

US Patent:

50439090, Aug 27, 1991

Filed:

Dec 30, 1988

Appl. No.:

7/292286

Inventors:

Clifford W. Meyers - Rancho Palos Verdes CA
Steven A. Biele - Harbor City CA
George R. Schwartz - Fountain Valley CA

Assignee:

Hughes Aircraft Company - Los Angeles CA

International Classification:

G06F 1520
G01R 2300

US Classification:

364484

Abstract:

An automated process and device for testing both C. W. and swept output signal modulation of a system or unit under test. The invention conditions the output signals to be compatible for measurement, measures incremental cycle periods of the signals using a continuous time counter, converts raw signal data into formatted tables, calculates prescribed parameters relating to the signals, aligns the calculated prescribed parameters relating to the signals, computes incremental signal frequencies from the incremental cycle periods as measured, substarts the incremental signal frequencies from the predicted signal frequencies to form a frequency residual model, constructs a curve using the incremental signal frequencies, and displays the curve. A prediction model is created and used to predict expected results. The prediction model defines ideal behavior of both C. W.

US Patent:

52686884, Dec 7, 1993

Filed:

May 13, 1992

Appl. No.:

7/882212

Inventors:

Clifford W. Meyers - Rancho Palos Verdes CA
Sandy A. Morales - Hermosa Beach CA
Gene Rzyski - Cypress CA
Mark M. Osugi - Long Beach CA

Assignee:

Hughes Aircraft Company - Los Angeles CA

International Classification:

H03M 166

US Classification:

341143

Abstract:

Linear signal reconstruction systems and methods that use mathematical relationships that exist between discrete time signals, digital to analog conversion characteristics and digital signal processing to produce a highly accurate, low noise, arbitrary analog signal from a discrete digital representation. This analog signal is produced by connecting discrete digital voltages through the use of a segmented straight line curve fit. This approach significantly reduces out of band harmonics that are normally associated with the stair-step approach while improving the output signal amplitude and phase accuracy. More specifically, the present system and method provides for reconstructing original analog signals from a digitized representation thereof. Digitized signals corresponding to the original analog signals are differentiated and then D to A converted into differentiated analog signals. The differentiated analog signals are then integrated to provide for reconstructed analog signals that correspond to the original analog signals.

US Patent:

54123259, May 2, 1995

Filed:

Dec 23, 1993

Appl. No.:

8/173534

Inventors:

Clifford W. Meyers - Rancho Palos Verdes CA

Assignee:

Hughes Aircraft Company - Los Angeles CA

International Classification:

G01R 2700

US Classification:

324613

Abstract:

Three independent signal sources are used to statistically derive the power spectral density of the phase noise content of signals from each of them. This is accomplished by mixing each of the signals two at a time (i. e. , signal one with signal two, signal one with signal three, and signal two with signal three) and capturing the resultant difference signals, such as with a waveform recorder, for example. A servo electronics loop is used to remove the carrier and any long term signal drift from the resultant difference signals. Statistical analysis is then used to compute the composite power spectral densities of the the resultant difference signals, and to solve for the individual power spectral densities of the original signals. The present system and method uses the mathematical relationships between the three sources that have similar magnitudes of phase noise, to compute the power spectral density of the noise content of signals from each source. The present system and method requires a minimum of interconnect hardware and only three inexpensive waveform recorders.

US Patent:

57940088, Aug 11, 1998

Filed:

Feb 28, 1996

Appl. No.:

8/608346

Inventors:

Clifford W. Meyers - Rancho Palos Verdes CA
John K. Doughty - Redondo Beach CA

Assignee:

Raytheon Company - Lexington MA

International Classification:

G06F 1100

US Classification:

395500

Abstract:

A low cost electrical network analyzer that provides waveform predictions in the time domain of a device for any electrical signal stimuli and with any load. In a preferred embodiment, input, output and stimulating source waveform recorders are used to record tables of time domain data (voltage waveforms) derived by stimulating the device under test with and without an output load coupled thereto. The tables of time domain data are representative of input and output signatures of the device. The tables are stored in a processor and are processed by way of a computer-implemented time domain network analyzer to produce sets of complex parameters as a function of time that are representative of the device. The parameters thus comprise a model of the analyzed device. The computer-implemented analyzer includes a data acquisition and emulator device (or software) that embodies mathematical equations describing particular electrical networks and that computes or measures input and output voltage waveforms of the device.