Abstract:
Support circuitry for a three-dimensional memory array is formed in a substrate at least partially under the three-dimensional memory array and defines open area in the substrate under the three-dimensional memory array. In one preferred embodiment, one or more memory arrays are formed at least partially in the open area under the three-dimensional memory array, while in another preferred embodiment, logic circuitry implementing one or more functions is formed at least partially in the open area under the three-dimensional memory array. In yet another preferred embodiment, both one or more memory arrays and logic circuitry are formed at least partially in the open area under the three-dimensional memory array. Other preferred embodiments are provided, and each of the preferred embodiments can be used alone or in combination with one another.