Cynthia Jane Whitehead

US Patent:

60919965, Jul 18, 2000

Filed:

Mar 2, 1998

Appl. No.:

9/033359

Inventors:

Cynthia Jane Whitehead - South Lake TX
Stephen J. Foster - Garland TX
Evan J. Evans - Alvord TX

Assignee:

Electronic Packaging Company - Dallas TX

International Classification:

G06K 934
G01N 2188

US Classification:

700 57

Abstract:

A method for repairing a printed circuit board includes the step of generating fault data relating to the plots or layout of a printed circuit board from a circuit board testing device. The printed circuit board under test is positioned on a workstation. An image containing repair data based on the fault data is projected directly onto the printed circuit board and is overlaid in registration with the plot or layout of the printed circuit board to assist in operator repair.

US Patent:

60497408, Apr 11, 2000

Filed:

Mar 2, 1998

Appl. No.:

9/033358

Inventors:

Cynthia Jane Whitehead - South Lake TX
Stephen J. Foster - Garland TX
Evan J. Evans - Alvord TX

Assignee:

CyberOptics Corporation - Golden Valley MN

International Classification:

G05B 1900

US Classification:

700 57

Abstract:

A method for verification of components installed on a printed circuit board includes the step of capturing an image of an entire printed circuit board and components mounted thereon using a scanning device. After it has been determined that a printed circuit board having no defects, the scanned image of the circuit board has no defects is stored in a memory. The image of the entire printed circuit board under test, and having potential defects is then captured using a scanning device. The image of the printed circuit board under test is then stored in a memory. The stored image of the printed circuit board having no defects is then overlaid in registration with the stored image of the printed circuit board with potential defects on a display in alternating sequence in order to visually provide an indication of a defective component or defective component placement on the printed circuit board under test to an operator.