Dale Allen Oakeson

US Patent:

6456123, Sep 24, 2002

Filed:

Aug 8, 2000

Appl. No.:

09/633923

Inventors:

Dale A. Oakeson - Midvale UT
Don R. Sauer - San Jose CA

Assignee:

National Semiconductor Corporation

International Classification:

H03K 500

US Classification:

327 91, 327 94

Abstract:

A translation circuit for transferring a differential voltage to a ground referenced voltage includes a differential input circuit, a sample/hold (S/H) circuit, and a compensation circuit. The S/H circuit includes a S/H capacitor, a series capacitor and a switch. The S/H and series capacitors are connected in series between an output line and a source of ground potential (GROUND). The switch shorts the bottom electrode of the S/H capacitor to GROUND when executing a translation operation. The differential input circuit receives the differential voltage and selectively provides the differential voltage across the S/H capacitor so that the top and bottom electrodes of the S/H capacitor have voltages V+ and V-, respectively. Parasitic capacitance tends to add charge to the S/H capacitor during the translation operation. The compensation circuit compensates for parasitic capacitance by removing, ideally, the same amount of charge from the S/H capacitor by the end of the translation operation.