Dan L Feng

US Patent:

7571401, Aug 4, 2009

Filed:

Dec 14, 2006

Appl. No.:

11/640137

Inventors:

Fangyi Rao - San Jose CA, US
Dan Feng - Los Altos CA, US

International Classification:

G06F 17/50
G06F 9/45

US Classification:

716 4, 716 1, 716 6

Abstract:

Methods for analyzing circuit distortion based on contributions from separate circuit elements are presented. Local approximations that do not require high-order derivatives of device models are developed near an operating point for calculating distortion summaries including compression summaries and second-order intermodulation (IM2) distortion summaries.

US Patent:

7761279, Jul 20, 2010

Filed:

Nov 16, 2007

Appl. No.:

11/941899

Inventors:

Qian Cai - Stewartsville NJ, US
Dan Feng - Los Altos CA, US

Assignee:

Cadence Design Systems, Inc. - San Jose CA

International Classification:

G06G 7/62
G06F 17/50

US Classification:

703 17, 703 14, 703 16

Abstract:

In one embodiment of the invention, a method of simulating a circuit is disclosed including simulating an analog component of the circuit over a first simulation time period with a first envelope simulation; adaptively switching from simulating the analog component with the first envelope simulation to simulating the analog component with a transient simulation over a second simulation time period; and adaptively switching from simulating the analog component with the transient simulation to simulating the analog component with a second envelope simulation over a third simulation time period. The adaptive switching from the first envelope simulation to the transient simulation may be in response to the envelope simulation accuracy falling below a predetermined level of accuracy in comparison with a transient simulation or in response to the second simulation time period including expected digital transitions where one or more digital events may occur to change the analog input signals to the analog component.

US Patent:

7774176, Aug 10, 2010

Filed:

Dec 14, 2005

Appl. No.:

11/303049

Inventors:

Fangyi Rao - San Jose CA, US
Dan Feng - Los Altos CA, US

Assignee:

Cadence Design Systems, Inc. - San Jose CA

International Classification:

G06F 17/50

US Classification:

703 2, 703 13, 455 6713, 324520

Abstract:

A pertubative approach based on the Born approximation resolves weakly nonlinear circuit models without requiring explicit high-order device derivatives. Convergence properties and the relation to Volterra series are discussed. According to the disclosed methods, second and third order intermodulation products (IM2, IM3) and intercept points (IP2, IP3) can be calculated by second and third order Born approximations under weakly nonlinear conditions. A diagrammatic representation of nonlinear interactions is presented. Using this diagrammatic technique, both Volterra series and Born approximations can be constructed in a systematic way. The method is generalized to calculate other high-order nonlinear effects such as IMn (nth order intermodulation product) and IPn (nth order intermodulation intercept point). In general, the equations are developed in harmonic form and can be implemented in both time and frequency domains for analog and RF circuits.

US Patent:

7979837, Jul 12, 2011

Filed:

Jun 15, 2009

Appl. No.:

12/484865

Inventors:

Fangyi Rao - San Jose CA, US
Dan Feng - Los Altos CA, US

Assignee:

Cadence Design Systems, Inc. - San Jose CA

International Classification:

G06F 17/50
G06F 9/45
G06F 11/22

US Classification:

716136, 716100, 716108, 703 12, 703 13, 703 14

Abstract:

Methods for analyzing circuit distortion based on contributions from separate circuit elements are presented. Local approximations that do not require high-order derivatives of device models are developed near an operating point for calculating distortion summaries including compression summaries and second-order intermodulation (IM2) distortion summaries.

US Patent:

8195440, Jun 5, 2012

Filed:

Feb 17, 2009

Appl. No.:

12/372608

Inventors:

Dan Feng - Los Altos CA, US
Joel R. Phillips - Sunnyvale CA, US
Kenneth Kundert - Los Altos CA, US

Assignee:

Cadence Design Systems, Inc. - San Jose CA

International Classification:

G06F 17/50

US Classification:

703 14

Abstract:

Described is a process for performing an improved mixed frequency-time algorithm to simulate responses of a circuit that receives a periodic sample signal and at least one information signal. The process selects a set of evenly spaced distinct time points and a set of reference time points. Each of the reference points is associated with a distinct time point, and a reference time point is a signal period away from its respective distinct time point. The process finds a first set of relationships between the values at the distinct time points and the values the reference time points. The process also finds a second set of relationships between the values at the distinct time points and the values at the reference time points. The process then combines the first and second sets of relationships to establish a system of nonlinear equations in terms of the values at the distinct time points only. By solving the system of nonlinear equations, the process finds simulated responses of the circuit in time domain.

US Patent:

8326591, Dec 4, 2012

Filed:

Nov 16, 2007

Appl. No.:

11/941904

Inventors:

Qian Cai - Stewartsville NJ, US
Dan Feng - Los Altos CA, US
Bruce W. McGaughy - Fremont CA, US
Jun Kong - San Jose CA, US
Rendong Lin - Fremont CA, US

Assignee:

Cadence Design Systems, Inc. - San Jose CA

International Classification:

G06F 17/50

US Classification:

703 13, 703 14

Abstract:

In one embodiment of the invention, a method of simulating a circuit is disclosed including partitioning a circuit into a plurality of blocks, each of the plurality of blocks being radio-frequency blocks or non-radio frequency blocks; performing a first simulation of a first simulation type with the radio-frequency blocks to generate output waveforms of the radio-frequency blocks; performing a second simulation of a second simulation type with the non-radio-frequency blocks to generate output waveforms of the non-radio-frequency blocks where the second simulation type differs from the first simulation type; and synchronizing the first simulation and the second simulation together at one or more time steps to generate output waveforms for the circuit.

US Patent:

7493240, Feb 17, 2009

Filed:

May 15, 2000

Appl. No.:

09/570709

Inventors:

Dan Feng - Los Altos CA, US
Joel R. Phillips - Sunnyvale CA, US
Kenneth Kundert - Los Altos CA, US

Assignee:

Cadence Design Systems, Inc. - San Jose CA

International Classification:

G06F 17/10

US Classification:

703 2, 703 14, 703 41, 716 1, 716 6, 716 4

Abstract:

Described is a process for performing an improved mixed frequency-time algorithm to simulate responses of a circuit that receives a periodic sample signal and at least one information signal. The process selects a set of evenly spaced distinct time points and a set of reference time points. Each of the reference points is associated with a distinct time point, and a reference time point is a signal period away from its respective distinct time point. The process finds a first set of relationships between the values at the distinct time points and the values at the reference time points. The process also finds a second set of relationships between the values at the distinct time points and the values at the reference time points. The process then combines the first and second sets of relationships to establish a system of nonlinear equations in terms of the values at the distinct time points only. By solving the system of nonlinear equations, the process finds simulated responses of the circuit in time domain.

US Patent:

20230089049, Mar 23, 2023

Filed:

Jun 29, 2022

Appl. No.:

17/853557

Inventors:

- Cupertino CA, US
Daniel L. Kovacs - Santa Clara CA, US
Shaun D. Budhram - Los Gatos CA, US
Edward Ahn - San Francisco CA, US
Behrooz Mahasseni - San Jose CA, US
Aashi Manglik - Sunnyvale CA, US
Payal Jotwani - Santa Clara CA, US
Mu Qiao - Campbell CA, US
Bo Morgan - Emerald Hills CA, US
Noah Gamboa - San Franciso CA, US
Michael J. Gutensohn - San Francisco CA, US
Dan Feng - Santa Clara CA, US
Siva Chandra Mouli Sivapurapu - Santa Clara CA, US

International Classification:

G06T 19/00

Abstract:

In one implementation, a method of displaying content is performed at a device including a display, one or more processors, and non-transitory memory. The method includes scanning a first physical environment to detect a first physical object in the first physical environment and a second physical object in the first physical environment, wherein the first physical object meets at least one first object criterion and the second physical object meets at least one second object criterion. The method includes displaying, in association with the first physical environment, a virtual object moving along a first path from the first physical object to the second physical object. The method includes scanning a second physical environment to detect a third physical object in the second physical environment and a fourth physical object in the second physical environment, wherein the third physical object meets the at least one first object criterion and the fourth physical object meets the at least one second object criterion. The method includes displaying, in association with the second physical environment, the virtual object moving along a second path from the third physical object to the fourth physical object, wherein the second path is different than the first path.