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Daniel T Chian

age ~50

from Los Altos, CA

Also known as:
  • Daniel Tsuteh Chian
  • Daniel L Chian
  • Daniel Tai Lee
  • Daniel T Chin
  • Daniel Chaian
  • Daniel Hou
Phone and address:
1849 Middleton Ave, Los Altos, CA 94024
(650)3868168

Daniel Chian Phones & Addresses

  • 1849 Middleton Ave, Los Altos, CA 94024 • (650)3868168
  • 2330 Jane Ln, Mountain View, CA 94043 • (650)3868168
  • 1950 Montecito Ave, Mountain View, CA 94043
  • 9112 Meadow Rue Ln, Annandale, VA 22003 • (703)9781981
  • Somerville, MA
  • Sunnyvale, CA
  • Santa Clara, CA

Work

  • Company:
    Microsoft
    Aug 2012
  • Position:
    Xbox principal electrical engineer

Education

  • Degree:
    MS
  • School / High School:
    Harvard University
    1996 to 1998
  • Specialities:
    Electrical Engineering

Skills

Embedded Systems • Usb • Hardware Architecture • Debugging • Pcb Design • Signal Integrity • Schematic Capture • Hardware • Soc • Pcie • Simulations • Management • Power Electronics • Voltage Regulator • System Architecture • Memory • Validation • Dft

Languages

Mandarin

Industries

Computer Software

Us Patents

  • Method And Apparatus For Synchronizing Graphics Pipelines

    view source
  • US Patent:
    63299968, Dec 11, 2001
  • Filed:
    Jan 8, 1999
  • Appl. No.:
    9/227227
  • Inventors:
    Andrew D. Bowen - San Jose CA
    Gregory C. Buchner - Los Altos CA
    Remi Simon Vincent Arnaud - San Jose CA
    Daniel T. Chian - Sunnyvale CA
    James Bowman - Pescadero CA
  • Assignee:
    Silicon Graphics, Inc. - Mountain View CA
  • International Classification:
    G06T 120
    G06F 1516
  • US Classification:
    345506
  • Abstract:
    A method and apparatus for synchronizing the execution of a sequence of graphics pipelines is provided. For a representative embodiment a sequence of graphics pipelines are connected in a daisy-chain sequence. Each pipeline operation can be controlled to operated in one of two modes. The first is a local mode where the pipeline outputs its own digital video data. The second is a pass-through mode where the pipeline outputs digital video data received from preceding graphics pipelines. The pipelines are configured to allow an application executing on a host process to select the next pipeline that will enter local mode operation. The pipeline that is selected to enter local mode operation asserts a local ready signal when it is ready to begin outputting its digital video information. Each of the pipelines monitors the state of a global ready signal. When the global ready signal becomes asserted it means that the pipeline that is selected to enter local mode operation is ready.
  • Receive And Transmit Coil Pair Selection

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  • US Patent:
    20220239158, Jul 28, 2022
  • Filed:
    Jan 22, 2021
  • Appl. No.:
    17/155897
  • Inventors:
    - Redmond WA, US
    Jay Michael Fassett - Edmonds WA, US
    Daniel Tsuteh Chian - Los Altos CA, US
    Rubén Caballero - San Jose CA, US
  • International Classification:
    H02J 50/40
    H02J 50/70
    H02J 50/90
    H02J 50/10
  • Abstract:
    A machine implemented method includes alternately energizing multiple transmit coils in a first device, receiving indications of received signal strength at receive coils in a second device, selecting a first pair of coils including a first transmit coil and a first receive coil having the greatest received signal strength, and transferring energy from the first transmit coil to the first receive coil.
  • Systems And Methods Of Head-Mounted Devices With Mixed Capacity Cells

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  • US Patent:
    20190051911, Feb 14, 2019
  • Filed:
    Aug 11, 2017
  • Appl. No.:
    15/675333
  • Inventors:
    - Redmond WA, US
    Daniel CHIAN - Los Altos CA, US
    Vijayasekaran BOOVARAGAVAN - Cupertino CA, US
    Dongli ZENG - Redmond WA, US
  • International Classification:
    H01M 6/42
    H01M 2/24
    H01M 2/02
    H01M 2/10
  • Abstract:
    An electronic device includes a frame and a battery. The frame is configured to be worn on a user's body. The battery is supported by the frame and includes a first cell and a second cell in electrical parallel. The first cell has a first capacity and the second cell has a second capacity that is different from the first capacity.
  • Multi-Pack And Component Connectivity Detection

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  • US Patent:
    20180006444, Jan 4, 2018
  • Filed:
    Jun 30, 2016
  • Appl. No.:
    15/199799
  • Inventors:
    Julian Binder - Sunnyvale CA, US
    Daniel Chian - Los Altos CA, US
  • International Classification:
    H02H 3/00
    H02H 7/18
  • Abstract:
    Techniques for enabling multi-pack and component connectivity detection are provided. In some configurations, individual PCMs can test the connectivity between components of a device without the need to operate the components. For example, PCMs configured in accordance with the present disclosure can test the connectivity between a motherboard, a display circuit, a camera, and a number of battery packs without the need to operate the motherboard, display circuit, camera, etc. In some configurations, conductors that are part of cables and connectors used to connect the components can be used to determine the state of one or more connections. When a signal that runs through the conductors meets one or more criteria, the PCMs of a device cause a predetermined delay prior to enabling one or more components. By testing the connectivity between components before each component transitions to an operational state, other problems caused by faulty connections can be mitigated.
  • Enhanced Parallel Protection Circuit

    view source
  • US Patent:
    20170302064, Oct 19, 2017
  • Filed:
    Apr 13, 2016
  • Appl. No.:
    15/097872
  • Inventors:
    Julian Binder - Sunnyvale CA, US
    Daniel Chian - Los Altos CA, US
    Eugene Shoykhet - San Jose CA, US
    Ruchi Parikh - Sunnyvale CA, US
  • International Classification:
    H02H 3/10
    H02H 7/18
    H02H 5/04
  • Abstract:
    An enhanced parallel protection circuit is provided. A system using separate battery packs in a parallel configuration is arranged with multiple protection circuit modules (PCMs). The PCMs are configured to detect fault conditions, such as over voltage, under voltage, excess current, etc. The PCMs can be configured to control associated switches and/or other components. When a fault condition is detected by an individual PCM, the individual PCM transitions to a fault state, and the PCM triggers an output causing one or more actions, e.g., causing a device to shut down or isolate one or more components. In addition, by the use of the techniques disclosed herein, the individual PCM can generate a control signal that causes other PCMs to transition to a fault state. The individual PCM can also receive a control signal from another PCM to cause the individual PCM to transition to a fault state.
Name / Title
Company / Classification
Phones & Addresses
Daniel Chian
Pippin Properties, LLC
1849 Middleton Ave, Los Altos, CA 94024

Resumes

Daniel Chian Photo 1

Director Of Electrical Engineering At Microsoft

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Location:
San Francisco, CA
Industry:
Computer Software
Work:
Microsoft since Aug 2012
Xbox Principal Electrical Engineer

Microsoft 2002 - Oct 2012
Xbox Sr. Electrical Engineer

Ishoni Networks 1998 - 2002
Sr. HW Engineer

Silicon Graphics 1998 - 2000
HW Design Engineer
Education:
Harvard University 1996 - 1998
MS, Electrical Engineering
University of Virginia 1992 - 1996
Bachelor of Science (BS), Electrical and Electronics Engineering
Skills:
Embedded Systems
Usb
Hardware Architecture
Debugging
Pcb Design
Signal Integrity
Schematic Capture
Hardware
Soc
Pcie
Simulations
Management
Power Electronics
Voltage Regulator
System Architecture
Memory
Validation
Dft
Languages:
Mandarin

News

La. Tech Golf Heads To Tucson Regional

La. Tech golf heads to Tucson Regional

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  • tanford, Wake Forest, California, Oregon, North Carolina, Georgia Tech, UC Riverside and Siena. Individuals selected to the Tucson Regional include Sean Walsh (Gonzaga), Brandon Bauman (UC Santa Barbara), Alex Chiarella (San Diego), Daniel Chian (Long Beach State) and Aaron Beverly (Sacramento State).
  • Date: May 05, 2016
  • Category: Sports
  • Source: Google

Familiar surroundings

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  • Wright, 17, opened with a 66, one stroke off Sycamore Hills competitive record, then had a second-round 69 and is five strokes ahead of Daniel Chian of Covina, Calif., who has posted back-to-back 70s.
  • Date: Aug 04, 2011
  • Category: Sports
  • Source: Google

Youtube

Daniel Chian golf swing

great golf swing.

  • Duration:
    2s

Daniel Chian golf swing in slow motion

golf swing in slow motion.

  • Duration:
    1m 5s

Daniel Chian golf swing 001

CIF individual final at Victoria Country Golf Club.

  • Duration:
    17s

Daniel Chian Iron shot

CIF individual final at Victoria Country Golf Club.

  • Duration:
    18s

ANDREW TATE AND CHIAN DO NOT GET ALONG | Gril...

We've delivered our most highly anticipated episode of all time with A...

  • Duration:
    1h 8m 10s

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