Daniel James Fleming

US Patent:

8273407, Sep 25, 2012

Filed:

Jan 29, 2007

Appl. No.:

11/668293

Inventors:

Albert S. Bergendahl - Jericho VT, US
Paul C. Castrucci - South Burlington VT, US
Daniel J. Fleming - South Burlington VT, US
Danny Tongsan Xiao - Willington CT, US

International Classification:

C23C 16/02

US Classification:

4272481, 427127, 427128, 427212, 427217

Abstract:

A method of fabricating a film of magnetic nanocomposite particles including depositing isolated clusters of magnetic nanoparticles onto a substrate surface and coating the isolated clusters of magnetic nanoparticles with an insulator coating. The isolated clusters of magnetic nanoparticles have a dimension in the range between 1 and 300 nanometers and are separated from each other by a distance in the range between 1 and 50 nanometers. By employing PVD, ablation, and CVD techniques the range of useful film thicknesses is extended to 10-1000 nm, suitable for use in wafer based processing. The described methods for depositing the magnetic nanocomposite thin films are compatible with conventional IC wafer and Integrated Passive Device fabrication.

US Patent:

43571786, Nov 2, 1982

Filed:

Nov 10, 1980

Appl. No.:

6/205122

Inventors:

David L. Bergeron - Winooski VT
Daniel J. Fleming - South Burlington VT
Geoffrey B. Stephens - Cary NC

Assignee:

IBM Corporation - Armonk NY

International Classification:

H01L 2948
H01L 21265

US Classification:

148 15

Abstract:

A self-isolated Schottky Barrier diode structure and method of fabrication are disclosed for generating a device having controlled characteristics. An opening is made through an oxide layer over a central region of an n-type semiconductor substrate. The opening has inclined sidewalls over an annular region surrounding the central region of the substrate. An n-type dopant layer is ion implanted through the opening and the surrounding oxide layer. This controls the barrier height for the Schottky Barrier diode. In the region of the substrate surrounding the annular region, where the ion implantation takes place through the full thickness of the oxide, the lifetime of minority carriers is controlled. This has the effect of minimizing PNP parasitic transistor action. A Schottky Barrier contact is formed in the opening through the oxide layer creating a rectifying junction with the semiconductor substrate in the central region.

US Patent:

43731660, Feb 8, 1983

Filed:

Dec 19, 1980

Appl. No.:

6/218156

Inventors:

D. L. Bergeron - Winooski VT
Daniel J. Fleming - South Burlington VT
Geoffrey B. Stephens - Cary NC

Assignee:

IBM Corporation - Armonk NY

International Classification:

H01L 2948
H01L 2964
H01L 2956

US Classification:

357 15

Abstract:

A self-isolated Schottky Barrier diode structure and method of fabrication are disclosed for generating a device having controlled characteristics. An opening is made through an oxide layer over a central region of an n-type semiconductor substrate. The opening has inclined sidewalls over an annular region surrounding the central region of the substrate. An n-type dopant layer is ion implanted through the opening and the surrounding oxide layer. This controls the barrier height for the Schottky Barrier diode and controls the lifetime of minority carriers in the outside region of the substrate. This has the effect of minimizing PNP parasitic transistor action. A Schottky Barrier contact is formed in the opening through an oxide layer creating a rectifying junction with the semiconductor substrate in the central region.