David Eugene Box

US Patent:

51795280, Jan 12, 1993

Filed:

Feb 26, 1992

Appl. No.:

7/841867

Inventors:

James E. Robertson - Denton TX
Jon C. Noeth - Garland TX
Terry L. Zumwalt - Garland TX
Glenn T. Mortland - Garland TX
David O. Box - McKinney TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G06F 1500

US Classification:

36471502

Abstract:

A programmable PLT transfer function circuit (50) uses a piecewise linear transformation (PLT) to approximate a non-linear transfer function (FIGS. 1B and 1C). The non-linear transfer function is approximated by a selected number of linear PLT segment transfer functions, each of which applies to a selected range of input data values, and is characterized by a PLT transformation (mx+b) in which output data is obtained by multiplying the input data by a gain coefficient and then adding an offset coefficient. The gain and offset coefficients that characterize the PLT segment transfer functions are updated at regular intervals, and stored in the PLT transfer function circuit (50). For each input data sample, segment selection logic (52) selects the appropriate PLT segment. The input data sample is then referenced (61) to the segment breakpoint (i. e. the initial data value) for that segment.

US Patent:

52745783, Dec 28, 1993

Filed:

Mar 12, 1992

Appl. No.:

7/850255

Inventors:

Jon C. Noeth - Garland TX
James E. Robertson - Denton TX
Terry L. Zumwalt - Garland TX
Glenn T. Mortland - Garland TX
David O. Box - McKinney TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G06F 1531

US Classification:

364582

Abstract:

A dynamic detector normalization circuit for normalizing detector output data using detector-error-correcting offset and gain coefficients that are updated in real time. The offset/gain coefficients are computed by a coefficient processor (20) at selected update intervals based on detector responses to a reference source. The coefficient processor averages detector reference responses over a number of update intervals to obtain updated offset/gain coefficients with greater precision than that available from the detector network. The detector normalization circuit (10) includes offset addition logic (12) and gain coefficient logic (14) for reading-out the offset/gain coefficients stored in respective RAMs (13, 15). For each detector output sample received by the detector normalization circuit (10), an offset addition operation 40 adds to the sample the MS bits of the offset coefficient. After the addition operation, the LS bits of the offset coefficient (representing increased precision available from the offset coefficient) are concatenated, and after underflow/overflow protection (42), an offset-corrected detector sample is obtained.

Address:

6743 Massa Ln, Frisco, TX 75034

Phone:

(972)3352087

VIN:

WDDHF5GB2BA462214

Make:

MERCEDES-BENZ

Model:

E-CLASS

Year:

2011