David E Mayhew

US Patent:

6996658, Feb 7, 2006

Filed:

May 21, 2002

Appl. No.:

10/152656

Inventors:

Lynne M. Brocco - Cambridge MA, US
Todd R. Comins - Chelmsford MA, US
Nathan J. Dohm - Natick MA, US
David E. Mayhew - Northborough MA, US
Carey J. McMaster - Stow MA, US

Assignee:

StarGen Technologies, Inc. - Marlborough MA

International Classification:

G06F 13/00

US Classification:

710312, 710315

Abstract:

The present invention relates generally to a generic fabric interconnect system and method for providing a data path between and among nodes and processing elements within an interconnection fabric. More specifically, there is provided a device accessible by a host processor for expanding access over a first bus to a second bus, the first bus and the second bus each being adapted to separately connect to respective ones of a plurality of bus-compatible devices, each device which comprise a link, a first circuit adapted to couple between the first bus and the link, and a second circuit adapted to couple between the link and the second bus, the first circuit and the second circuit each being operated as a bridge and being operable to (a) send outgoing information serially through said link in a form different from that of the first bus and the second bus (b) approve an initial exchange between the first bus and the second bus in response to pending bus transactions having a characteristic signifying a destination across a device, and (c) allow the host processor, communicating through the first bus, to individually address different selectable ones of the bus-compatible devices on the second bus: (i) using on the first bus substantially the same type of addressing as is used to access devices on the first bus, and (ii) without first employing a second, intervening one of the bus-compatible devices on the second bus.

US Patent:

7062581, Jun 13, 2006

Filed:

Sep 21, 2004

Appl. No.:

10/945615

Inventors:

Lynne M. Brocco - Cambridge MA, US
Todd R. Comins - Chelmsford MA, US
Nathan J. Dohm - Natick MA, US
David E. Mayhew - Northborough MA, US
Carey J. McMaster - Stow MA, US

Assignee:

StarGen Technologies, Inc. - Marlboro MA

International Classification:

G06F 13/00

US Classification:

710104, 710316, 370338, 370401, 709224

Abstract:

The present invention relates generally to a generic fabric interconnect system and method for providing a data path between and among nodes and processing elements within an interconnection fabric. More specifically, there is provided a device accessible by a host processor for expanding access over a first bus to a second bus, the first bus and the second bus each being adapted to separately connect to respective ones of a plurality of bus-compatible devices, each device which comprise a link, a first circuit adapted to couple between the first bus and the link, and a second circuit adapted to couple between the link and the second bus, the first circuit and the second circuit each being operated as a bridge and being operable to (a) send outgoing information serially through said link in a form different from that of the first bus and the second bus (b) approve an initial exchange between the first bus and the second bus in response to pending bus transactions having a characteristic signifying a destination across a device, and (c) allow the host processor, communicating through the first bus, to individually address different selectable ones of the bus-compatible devices on the second bus: (i) using on the first bus substantially the same type of addressing as is used to access devices on the first bus, and (ii) without first employing a second, intervening one of the bus-compatible devices on the second bus.

US Patent:

7133955, Nov 7, 2006

Filed:

Sep 11, 2003

Appl. No.:

10/660200

Inventors:

David E. Mayhew - Northborough MA, US
Todd R. Comins - Chelmsford MA, US
Lynne M. Brocco - Cambridge MA, US

Assignee:

StarGen, Inc. - Marlborough MA

International Classification:

G06F 13/14

US Classification:

710305, 710105

Abstract:

A system and method for selecting a fabric master using an announce phase and a own phase. During an announce phase a candidate master interrogates its Node Path Identifier to ensure that it has not already surrendered ownership to another node. If the candidate master has won the election, it then broadcasts its EUI with an indication that it is the new fabric master.

US Patent:

7146452, Dec 5, 2006

Filed:

Nov 12, 2005

Appl. No.:

11/271273

Inventors:

Lynne M. Brocco - Cambridge MA, US
Todd R. Comins - Chelmsford MA, US
Nathan J. Dohm - Natick MA, US
David E. Mayhew - Northborough MA, US
Carey J. McMaster - Stow MA, US

Assignee:

StarGen Technologies, Inc. - Marlborough MA

International Classification:

G06F 13/00

US Classification:

710312, 710315

Abstract:

The present invention relates generally to a generic fabric interconnect system and method for providing a data path between and among nodes and processing elements within an interconnection fabric. More specifically, there is provided a device accessible by a host processor for expanding access over a first bus to a second bus, the first bus and the second bus each being adapted to separately connect to respective ones of a plurality of bus-compatible devices, each device which comprise a link, a first circuit adapted to couple between the first bus and the link, and a second circuit adapted to couple between the link and the second bus, the first circuit and the second circuit each being operated as a bridge and being operable to (a) send outgoing information serially through said link in a form different from that of the first bus and the second bus (b) approve an initial exchange between the first bus and the second bus in response to pending bus transactions having a characteristic signifying a destination across a device, and (c) allow the host processor, communicating through the first bus, to individually address different selectable ones of the bus-compatible devices on the second bus: (i) using on the first bus substantially the same type of addressing as is used to access devices on the first bus, and (ii) without first employing a second, intervening one of the bus-compatible devices on the second bus.

US Patent:

7443869, Oct 28, 2008

Filed:

Dec 23, 2003

Appl. No.:

10/745737

Inventors:

Gary A. Solomon - Acton MA, US
Edward Butler - Chandler AZ, US
Joseph A. Schaefer - Chandler AZ, US
David E. Mayhew - Northborough MA, US
Todd R. Comins - Chelmsford MA, US
Lynne M. Brocco - Cambridge MA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 13/38

US Classification:

370412, 710 52

Abstract:

A queuing mechanism is described for managing packets between agents of a computer system. The queuing mechanism includes an ordered queue including a plurality of queue registers to store a plurality of packets. The queuing mechanism also includes a bypass queue coupled to the ordered queue, wherein, if a packet at head of the ordered queue is a delayed request and is stalled for lack of flow control credit, then the stalled packet is moved into the bypass queue.

US Patent:

7447208, Nov 4, 2008

Filed:

Dec 23, 2003

Appl. No.:

10/746043

Inventors:

David E. Mayhew - Northborough MA, US
Todd R. Comins - Chelmsford MA, US
Lynne M. Brocco - Cambridge MA, US
Joseph A. Schaefer - Chandler AZ, US
Gary A. Solomon - Acton MA, US
Edward Butler - Chandler AZ, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H04L 12/28
H04J 3/24

US Classification:

370392, 370474

Abstract:

A method for accessing a configuration space of a device is described. The method includes setting a first field of a packet to a value to specify a destination device, and setting a second field of the packet to a defined value to indicate that the packet is a configuration access packet. The method further includes setting a third field of the configuration access packet to a value to select one of a plurality of configuration apertures of a configuration space of the destination device, and setting a fourth field of the configuration access packet to a value to address a specific memory location within the selected aperture.

US Patent:

7518996, Apr 14, 2009

Filed:

Sep 16, 2004

Appl. No.:

10/942203

Inventors:

David Mayhew - Northborough MA, US
Nathan Dohm - Natick MA, US

Assignee:

Jinsalas Solutions, LLC - Dover DE

International Classification:

H04J 1/16
H04L 12/28

US Classification:

370236, 370409, 370412

Abstract:

The invention provides an improved architecture for credit based flow control. Briefly, the memory space within the receiving switch is separated into two parts, a statically allocated portion and a dynamically allocated portion. Packets are first placed in the dynamically allocated portion, and the credits are returned immediately. When the dynamically allocated portion has no additional space, the packets are then stored in the memory portion statically allocated to the specific virtual circuit. Credits are returned when the packets are removed from the statically allocated memory portion. This scenario allows the immediate return of credits when there is space available in the dynamically allocated memory portion. It also allows improved sharing of the overall memory since more of the overall memory can be made available to a particular virtual circuit.

US Patent:

7646760, Jan 12, 2010

Filed:

Sep 21, 2004

Appl. No.:

10/945633

Inventors:

Lynne M. Brocco - Cambridge MA, US
Todd R. Comins - Chelmsford MA, US
Nathan J. Dohm - Natick MA, US
David E. Mayhew - Northborough MA, US
Carey J. McMaster - Stow MA, US

International Classification:

H04L 12/28
H04L 12/56

US Classification:

370351, 370389

Abstract:

A system and method for routing data elements from an origin to a terminus is disclosed. The switches each have a plurality of ports. These ports are numbered relative to one another, such that a first output port, adjacent to the input port, may be numbered “0”, while a second output port, adjacent to the first output port, would be numbered “1”, This numbering continues for each port in the switch. When a data element is received on an input port of the switch, an output port is selected based on a value contained in that received data element. In one embodiment, the value is contained within a path specification, which includes a count field and a plurality of turn fields.