David V Navarro

US Patent:

20120005401, Jan 5, 2012

Filed:

Jun 30, 2010

Appl. No.:

12/827818

Inventors:

Vaijayanthimala K. Anand - Austin TX, US
David Navarro - Austin TX, US
Bret R. Olszewski - Austin TX, US
Sergio Reyes - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 12/08
G06F 15/177
G06F 12/00

US Classification:

711 6, 713 2, 711147, 711E12001, 711E12016

Abstract:

An apparatus includes a processor and a volatile memory that is configured to be accessible in an active memory sharing configuration. The apparatus includes a machine-readable encoded with instructions executable by the processor. The instructions including first virtual machine instructions configured to access the volatile memory with a first virtual machine. The instructions including second virtual machine instructions configured to access the volatile memory with a second virtual machine. The instructions including virtual machine monitor instructions configured to page data out from a shared memory to a reserved memory section in the volatile memory responsive to the first virtual machine or the second virtual machine paging the data out from the shared memory or paging the data in to the shared memory. The shared memory is shared across the first virtual machine and the second virtual machine. The volatile memory includes the shared memory.

US Patent:

20130159614, Jun 20, 2013

Filed:

Feb 15, 2013

Appl. No.:

13/768591

Inventors:

International Business Machines Corporation - Armonk NY, US
David Navarro - Austin TX, US
Bret R. Olszewski - Austin TX, US
Sergio Reyes - Austin TX, US

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY

International Classification:

G11C 7/10
G06F 9/44

US Classification:

711104, 713 2

Abstract:

An apparatus includes a processor and a volatile memory that is configured to be accessible in an active memory sharing configuration. The apparatus includes a machine-readable encoded with instructions executable by the processor. The instructions including first virtual machine instructions configured to access the volatile memory with a first virtual machine. The instructions including second virtual machine instructions configured to access the volatile memory with a second virtual machine. The instructions including virtual machine monitor instructions configured to page data out from a shared memory to a reserved memory section in the volatile memory responsive to the first virtual machine or the second virtual machine paging the data out from the shared memory or paging the data in to the shared memory. The shared memory is shared across the first virtual machine and the second virtual machine. The volatile memory includes the shared memory.

US Patent:

20150046648, Feb 12, 2015

Filed:

Aug 12, 2013

Appl. No.:

13/964365

Inventors:

- Armonk NY, US
Adrian C. Gerhard - Rochester MN, US
David Navarro - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 12/08

US Classification:

711118

Abstract:

A method, system and memory controller for implementing dynamic enabling and disabling of cache based upon workload in a computer system. Predefined sets of information are monitored while the cache is enabled to identify a change in workload, and selectively disabling the cache responsive to a first identified predefined workload. Monitoring predefined information to identify a second predefined workload while the cache is disabled, and selectively enabling the cache responsive to said identified second predefined workload.