David M Newmark

US Patent:

6766498, Jul 20, 2004

Filed:

Aug 28, 2002

Appl. No.:

10/229716

Inventors:

Mahesh S. Sharma - Austin TX
David M. Newmark - Austin TX
Teja Singh - Austin TX
Joshua A. Bell - Austin TX

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F 1750

US Classification:

716 5, 716 6

Abstract:

A method, system and computer program product for extracting parasitic resistance and capacitance values to simulate performance of an integrated circuit. A selected number of interconnections in an integrated circuit may be identified (âinterconnections of interestâ). A netlist containing a list of the transistors in the integrated circuit may be pruned by selecting those transistors in the netlist that are in the channel connected regions on the driving side of the interconnections of interest and those on the receiving side of the interconnections of interest. Parasitic resistance and capacitance values for layout layers connected to the interconnections of interest may be extracted. These extracted parasitic resistance and capacitance values may be associated with the transistors connected to those layout layers in the pruned netlist. By extracting parasitic resistance and capacitance values as describe above, less compute-intensive RC extractions may be made thereby using less memory and processing power.

US Patent:

7272808, Sep 18, 2007

Filed:

Jun 8, 2005

Appl. No.:

11/147782

Inventors:

Mahesh S. Sharma - Austin TX, US
David M. Newmark - Austin TX, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F 9/45
G06F 17/50

US Classification:

716 6

Abstract:

An apparatus, method and system for performing a race analysis on an integrated circuit design which includes incorporating effects of on-chip transistor gate length (Lgate) and resistance variations into the race analysis and modeling on circuit performance while taking into account intra-chip transistor Lgate spatial variability.

US Patent:

7398495, Jul 8, 2008

Filed:

Apr 6, 2006

Appl. No.:

11/398832

Inventors:

Russell Schreiber - Austin TX, US
David M. Newmark - Austin TX, US
Joe Spector - Austin TX, US

Assignee:

Advanced Micro Devices, Inc. - Austin TX

International Classification:

G06F 17/50

US Classification:

716 6

Abstract:

The present invention provides a method and apparatus for characterizing a memory array. The method includes accessing information indicative of a transistor-level circuit design of a column of a memory array and determining at least one component of a cell representative of the column of the memory array based on the information indicative of the transistor-level circuit design and at least one timing rule for at least one signal associated with the column of the memory array. The method also includes determining at least one time delay associated with the cell based on the at least one component of at least one cell.

US Patent:

7689953, Mar 30, 2010

Filed:

Jan 18, 2006

Appl. No.:

11/334220

Inventors:

David M. Newmark - Austin TX, US
Mahesh S. Sharma - Austin TX, US

Assignee:

Globalfoundries Inc. - Grand Cayman

International Classification:

G06F 17/50

US Classification:

716 6, 716 1, 716 2, 716 18

Abstract:

The present invention provides a method and apparatus for determining cell-based timing elements based on a transistor-level circuit design. The method may include accessing information indicative of a transistor-level circuit design determining at least one component of at least one cell based on the information indicative of the transistor-level circuit design, and determining at least one time delay associated with the transistor-level circuit design based on said at least one component of at least one cell.

US Patent:

20060074752, Apr 6, 2006

Filed:

Oct 5, 2004

Appl. No.:

10/959295

Inventors:

David Newmark - Tarzana CA, US

International Classification:

G06Q 30/00

US Classification:

705014000

Abstract:

A method of facilitating placement of an advertisement. A specification, which includes at least a budget and a reserve cost and designates creative material for the advertisement, is received from an advertiser. A deposit of funds, in an amount that is at least equal to the budget, and the creative material, are also received from the advertiser. The specification is publicized to media carriers. One or more bids from one or more of the media carriers are received. Each received bid is compared with the specification. Those media carriers submitting bids which are below the reserve costs are identified. The creative material is then transferred to each of the identified media carriers for placement.

US Patent:

20080065504, Mar 13, 2008

Filed:

Sep 13, 2006

Appl. No.:

11/531675

Inventors:

David Newmark - Tarzana CA, US
Randolph Wang - Torrance CA, US

Assignee:

Newmark Communications, Inc., - Encino CA

International Classification:

G06Q 30/00

US Classification:

705 26

Abstract:

A method enables a seller to bid in multiple electronic reverse auctions. The method includes determining auctions for which the seller is eligible, informing the seller of the eligible auctions, and receiving a selection indicating which of the eligible auctions the seller will participate in. The method also includes receiving a single bid from the seller, and applying the single bid to each of the selected auctions. Based upon the single bid, as well as bids from other sellers, winnings are determined for each of the selected auctions.