David W Roe

US Patent:

6798257, Sep 28, 2004

Filed:

Mar 21, 2001

Appl. No.:

09/814244

Inventors:

David Glen Roe - San Jose CA

Assignee:

Cisco Technology, Inc. - San Jose CA

International Classification:

H03L 706

US Classification:

327147, 327156

Abstract:

Methods and apparatus are disclosed for providing multiple clock signals on a chip using a second phase-locked loop library circuit connected to a buffered reference clock output of a first PLL library circuit which may be used, inter alia, in a computer or communications system, such as a computer or communications device, packet switching system, router, other device, or component thereof. Known prior circuits would typically use multiple off-chip reference clock signals for those applications that require multiple reference clocks. Implementations according to the invention may be particularly useful for possibly providing a lower-cost solution when, for example, such a circuit provides the capability to maintain tight timing, without sacrificing input pins, or excessively loading the PC boards clock driver. Various implementations of such circuits include an ASIC or those using any chip implementation technology or combinations of technologies, including but not limited to VLSI design and discrete components.

US Patent:

20030014906, Jan 23, 2003

Filed:

Jul 11, 2001

Appl. No.:

09/904002

Inventors:

David Roe - Pleasant Hill CA, US

International Classification:

A01M001/20
A01M005/00
A01M007/00
A01M017/00

US Classification:

043/132100

Abstract:

A method for controlling termites using a biological control agent and a termite monitor wherein the bait in the termite monitor is treated with the biological control agent, thereby infecting the termites when they eat the bait.

US Patent:

59296550, Jul 27, 1999

Filed:

Mar 25, 1997

Appl. No.:

8/824203

Inventors:

David Glen Roe - San Jose CA
Poucheng Wang - Mountain View CA

Assignee:

Adaptec, Inc. - Milpitas CA

International Classification:

A03K 190175

US Classification:

326 82

Abstract:

A dual-purpose I/O circuit for use in an integrated circuit having a primary circuit is provided. The dual-purpose I/O circuit includes two conducting pads, two single-ended I/O cells and one differential I/O cell. Several dual-purpose I/O circuits can be used within a single integrated circuit to support both single-ended and/or differential mode I/O signaling between external circuits and devices and a primary circuit within the integrated circuit. Within each dual-purpose I/O circuit, a first single-ended I/O cells is connected to a first conducting pad, a second single-ended I/O cell is connected to the second conducting pad and a differential I/O cell is connected to the both the first single-ended and second single-ended I/O cells and to both the first and second conducting pads. A control logic is connected to at least one of the first single-ended, second single-ended and differential I/O cells. The control logic is arranged to selectively enable and disable at least one of the first single-ended, second single-ended and differential I/O cells.

US Patent:

57611297, Jun 2, 1998

Filed:

Mar 25, 1997

Appl. No.:

8/824202

Inventors:

David Glen Roe - San Jose CA
Richard Lingard Kalish - Castro Valley CA

Assignee:

Adaptec, Inc. - Milpitas CA

International Classification:

G11C 1300

US Classification:

36518901

Abstract:

A RAM and I/O controller is provided with logic for controlling access to a DRAM and to one or more input and/or output latches, each of which are coupled to a RAM data bus. The logic receives input signals such as a refresh request signal and a RAM access request signal from other circuits or devices, and outputs one or more associated control signals onto a RAM control bus, such as a RAS output signal or a CAS output signal. The logic includes at least one idle state during which the DRAM is in a RAS or CAS precharge period. During the idle state, the logic de-asserts the RAS or CAS output and asserts one or more control signals to the input and/or output latches so as to perform at least one write and/or read operation of miscellaneous data signals with the latches 112 and 114 of FIG. 2a over the temporarily idle RAM data bus. A method is also provided for I/O multiplexing a RAM bus by providing one or more control signals, such as a RAS signal and a CAS signal for a DRAM on a RAM control bus, and performing at least one read operation and/or write operation on a RAM data bus from circuits or devices, other than the DRAM, during one or more of the RAM's precharge cycles or periods.

US Patent:

52464172, Sep 21, 1993

Filed:

Dec 11, 1991

Appl. No.:

7/806055

Inventors:

Ronald P. Haak - San Jose CA
Felix Theeuwes - Los Altos CA
David K. Roe - Portland OR

Assignee:

ALZA Corporation - Palo Alto CA

International Classification:

A61N 130

US Classification:

604 20

Abstract:

Apparatus (11) for delivery of a medicament, drug or other therapeutic agent transdermally to a body by iontophoresis is provided. The apparatus (11) provides a means (13) for measuring and displaying the cumulative amount of the medicament delivered to the body by monitoring the amount of a metal, initially present at the anode (45), that is transferred to the cathode (41) in a subsidiary electrolyte cell (47) through which the drive current for the apparatus (11) passes. Optionally, the apparatus also provides a plurality of light emitting devices (63-1) that display a measure of the cumulative amount of medicament delivered, by use of visually distinguishable light colors or by use of binary encoding in the light display.

US Patent:

54456061, Aug 29, 1995

Filed:

May 28, 1993

Appl. No.:

8/069061

Inventors:

Ronald P. Haak - San Jose CA
Felix Theeuwes - Los Altos CA
David K. Roe - Portland OR

Assignee:

ALZA Corporation - Palo Alto CA

International Classification:

A61N 130

US Classification:

604 20

Abstract:

Apparatus (11) for delivery of a medicament, drug or other therapeutic agent transdermally to a body by iontophoresis is provided. The apparatus (11) provides a means (13) for measuring and displaying the cumulative amount of the medicament delivered to the body by monitoring the amount of a metal, initially present at the anode (45), that is transferred to the cathode (41) in a subsidiary electrolyte cell (47) through which the drive current for the apparatus (11) passes. Optionally, the apparatus also provides a plurality of light emitting devices (63-1) that display a measure of the cumulative amount of medicament delivered, by use of visually distinguishable light colors or by use of binary encoding in the light display.

US Patent:

50974394, Mar 17, 1992

Filed:

Dec 14, 1990

Appl. No.:

7/626428

Inventors:

Edward L. Patriquin - San Jose CA
David G. Roe - San Jose CA

Assignee:

Quantum Corporation - Milpitas CA

International Classification:

G06F 1320

US Classification:

395425

Abstract:

An expansible fixed disk drive data storage subsystem enables attachment of multiple bus-level interface fixed disk drives to a host computer at a single us-level interface fixed disk drive input/output logiical address location. The subsystem includes an interface for direct plug-in attachment to the input/output address, data and control buses of the host computer, and an expansible plurality of disk drive clusters operatively connectable to the interface, each cluster including plural disk drive cables wherein each cable provides an electrical connection to at least one bus-level interface fixed disk drive operatively associated with the cluster; a cluster and cable selection circuit for receiving and storing cluster and cable selection values sent by the host cmputer, gated data, address and control/status lines buffers for connecting a selected cable and its disk drive(s) to the input/output buses of the host computer in response to a particular cluster and cable selection value sent by the host computer, and a disk drive interrupt status register which when set by a said disk drive within the cluster and read by the host computer indicates to the host computer that the disk drive has performed some task or requires attention.