David Virgil Vogel

US Patent:

20210117365, Apr 22, 2021

Filed:

Dec 26, 2020

Appl. No.:

17/134293

Inventors:

- Santa Clara CA, US
Nobuyuki Suzuki - Portland OR, US
Anoop Mukker - Folsom CA, US
Daniel Nemiroff - El Dorado Hills CA, US
David W. Vogel - Sacramento CA, US

International Classification:

G06F 13/42
G06F 1/08
G06F 1/24
G06F 1/3287
G06F 9/4401

Abstract:

An example includes detecting receiving a bus turn-around (BTA) sequence after detecting a voltage level; sending a BTA acknowledgement in response to the BTA sequence; and sending a configuration command to a peripheral device after the interface is initialized based on the BTA acknowledgement.

US Patent:

20200356518, Nov 12, 2020

Filed:

Jan 22, 2019

Appl. No.:

16/254266

Inventors:

- Santa Clara CA, US
Nobuyuki Suzuki - Portland OR, US
Anoop Mukker - Folsom CA, US
Daniel Nemiroff - El Dorado Hills CA, US
David W. Vogel - Sacramento CA, US

International Classification:

G06F 13/42
G06F 1/08
G06F 1/24
G06F 1/3287
G06F 9/4401

Abstract:

An example method for initializing an interface includes driving a low voltage signal on data lanes and clock lanes. The method further includes performing a reset sequence and an initialization of a link configuration register. The method also includes driving a high voltage signal to the clock lanes and the data lanes. The method further includes driving a bus turn-around (BTA) sequence on the data lanes. The method also includes detecting that the BTA is acknowledged by a host controller.

US Patent:

20170154009, Jun 1, 2017

Filed:

Mar 15, 2016

Appl. No.:

15/070481

Inventors:

- Santa Clara MN, US
Nobuyuki Suzuki - Portland OR, US
Anoop Mukker - Folsom CA, US
Daniel Nemiroff - El Dorado Hills CA, US
David W. Vogel - Sacramento CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 13/42
G06F 1/08
G06F 1/24
G06F 9/44
G06F 1/32

Abstract:

An example method for initializing an interface includes driving a low voltage signal on data lanes and clock lanes. The method further includes performing a reset sequence and an initialization of a link configuration register. The method also includes driving a high voltage signal to the clock lanes and the data lanes. The method further includes driving a bus turn-around (BTA) sequence on the data lanes. The method also includes detecting that the BTA is acknowledged by a host controller.