David Yuan-Shiu Yang

US Patent:

6369737, Apr 9, 2002

Filed:

Oct 30, 1997

Appl. No.:

08/960823

Inventors:

David Yang - Palo Alto CA
Abbas El Gamal - P. A. CA
Boyd Fowler - Sunnyvale CA

Assignee:

The Board of Trustees of the Leland Stanford Junior University - Palo Alto CA

International Classification:

H03M 112

US Classification:

341155, 341169

Abstract:

An analog-to-digital conversion scheme allows the conversion of a small dynamic range analog signal into a floating-point, digital representation with a larger dynamic range. A montonically changing analog signal is reset to a reference value at time t=0. The analog signal is then sub-converted by an analog-to-digital converter with maximum input signal level S to corresponding digital representations at several sub-conversion times t=T T t=T T ,. . . t=T T , where T T. These digital representations are then suitably combined to produce a cumulative, floating-point digital representation which accurately represents the analog signal even if the analog signal has a value greater than S at time t=T.

US Patent:

6445369, Sep 3, 2002

Filed:

Feb 17, 1999

Appl. No.:

09/251527

Inventors:

Edward S. Yang - Menlo Park CA
Grantham Kwok-Hung Pang - Hong Kong, CN
Chris Sun-Kin Yeung - Hong Kong, CN
David Yang - Menlo Park CA
Michael Kin-Ming Hong - Hong Kong, CN
To-On Kwan - Hong Kong, CN
Chi-Ho Chan - Hong Kong, CN
Ka-Lim Ho - Hong Kong, CN
Lawrence Ming-Him Ko - Hong Kong, CN

Assignee:

The University of Hong Kong - Hong Kong

International Classification:

G09G 332

US Classification:

345 82, 345 39, 34082582, 359149, 359181

Abstract:

A dot matrix display system made up of light emitting diodes (LEDs), n which one or more LEDs are modulated and encoded with audio information or messages is disclosed. The system has a LED dot matrix display panel with an interface circuit to a computer, an audio signal transmitter, and a receiver. An executive program runs on the computer for the visual display control of characters, decorative pattern or messages on the display panel. The receiver combined with a speaker is located at a distance from the display panel. The receiver is designed to demodulate the optically transmitted audio information and broadcast the messages with the speaker. The modulation of the LEDs includes a voltage-controlled oscillator (VCO) for varying the frequency of on/off periods of said light emitting diodes. The frequency is high enough such that the perceivable light appears to be constantly illuminated to the human eye.

US Patent:

6538593, Mar 25, 2003

Filed:

Feb 28, 2002

Appl. No.:

10/085341

Inventors:

David Yang - Palo Alto CA
Abbas El Gamal - P.A. CA
Boyd Fowler - Sunnyvale CA

Assignee:

The Board of Trustees of the Leland Stanford Junior University - Stanford CA

International Classification:

H03M 1102

US Classification:

341155, 341169

Abstract:

An analog-to-digital conversion scheme allows the conversion of a small dynamic range analog signal into a floating-point, digital representation with a larger dynamic range. A montonically changing analog signal is reset to a reference value at time t=0. The analog signal is then sub-converted by an analog-to-digital converter with maximum input signal level S to corresponding digital representations at several sub-conversion times t=T T , t=T T ,. . . t=T T , where T T. These digital representations are then suitably combined to produce a cumulative, floating-point digital representation which accurately represents the analog signal even if the analog signal has a value greater than S at time t=T.

US Patent:

8298958, Oct 30, 2012

Filed:

Jul 17, 2008

Appl. No.:

12/175153

Inventors:

Yoko Y. Adams - Union City CA, US
David Yang - Union City CA, US

Assignee:

Lam Research Corporation - Fremont CA

International Classification:

H01L 21/302

US Classification:

438717, 438725, 438734, 438736

Abstract:

A method for reducing very low frequency line width roughness (LWR) in forming etched features in an etch layer disposed below a patterned organic mask is provided. The patterned organic mask is treated to reduce very low frequency line width roughness of the patterned organic mask, comprising flowing a treatment gas comprising H, wherein the treatment gas has a flow rate and Hhas a flow rate that is at least 50% of the flow rate of the treatment gas, forming a plasma from the treatment gas, and stopping the flow of the treatment gas. The etch layer is etched through the treated patterned organic mask with the reduced very low LWR.

US Patent:

20010009440, Jul 26, 2001

Filed:

Mar 6, 2001

Appl. No.:

09/801014

Inventors:

David Yang - Mountain View CA, US
Zhonghan Deng - Albany CA, US

International Classification:

H04N003/14

US Classification:

348/294000, 348/302000, 348/308000

Abstract:

An improved technique for updating a memory in digital pixel sensors in which a memory update may be directed to only some of the locations or cells in the memory is disclosed. According to one embodiment, a multiplex scheme is employed, in which a threshold memory identifies the locations within a row of memory that are to be updated. Data are first read out of a row of memory to be updated. The data are copied to a first buffer or other short term storage area within the digital pixel sensor. New data from the sensor portion of the digital pixel sensor to be written to the memory are stored in a second buffer. The contents of the threshold memory are then applied to a select input of a multiplexer, where the contents of the first and second buffers comprise first and second data inputs to the multiplexer. Thus, the output of the multiplexer comprises an updated row of memory in which only those locations that are to be updated have been changed. The output of the multiplexer is preferably written directly back to the memory and a next row of memory may then be updated.

US Patent:

20010040631, Nov 15, 2001

Filed:

Jan 3, 2001

Appl. No.:

09/755910

Inventors:

Odutola Ewedemi - San Jose CA, US
Zhonghan Deng - Mountain View CA, US
Ricardo Motta - Palo Alto CA, US
David Yang - Mountain View CA, US

International Classification:

H04N003/14

US Classification:

348/294000, 348/302000, 348/311000

Abstract:

An image sensor includes a sensor or a pixel array, a data memory, and a logic circuit, all fabricated on the same integrated chip. The sensor or pixel array outputs digital signals as pixel data representing an image of a scene. The data memory is coupled to the sensor or pixel array for storing the pixel data. The logic circuit is coupled to the data memory and provides a memory interface for exporting the pixel data. The memory interface can be one of a SRAM, a DRAM or a packet protocol synchronous DRAM interface. Including a memory interface in the image sensor allows the image sensor to be coupled directly to the memory interface port of an external image processing unit. The image processing unit can access the image sensor using conventional memory access protocols, thus improving the efficiency and reducing the operational complexity of the image processing unit.

US Patent:

20010040632, Nov 15, 2001

Filed:

Jul 16, 2001

Appl. No.:

09/907099

Inventors:

David Xiao Yang - Mountain View CA, US
Zhonghan Deng - Albany CA, US

International Classification:

H04N005/235

US Classification:

348/294000, 348/362000

Abstract:

An architecture for a digital pixel sensor is disclosed in which the dynamic range of the sensor is increased by taking samples of a subject to be recorded, where each sample is taken over an interval of a different duration than the other samples. In the preferred embodiment of the invention, an array of pixel elements is fabricated in an integrated circuit that also includes a memory space for storing selectively digital signals of the samples from the digital elements.

US Patent:

20010040633, Nov 15, 2001

Filed:

May 23, 2001

Appl. No.:

09/864296

Inventors:

David Yang - Mountain View CA, US

International Classification:

H04N003/14
H04N005/335

US Classification:

348/302000, 348/294000

Abstract:

An image sensor architecture that accommodates the relative mismatch of bus width between the image sensor, processor, and memory is disclosed. The preferred embodiment of the invention provides a dual-ported memory structure having a relatively wide data port for receiving data from the image sensor and having a relatively narrow data port for communicating data to and from the processor. In one embodiment of the invention, the memory is organized into banks of a specific width. The banks may be accessed sequentially by the processor, such that the bus width is equivalent to the bank width, and the banks may be accessed simultaneously, such that the bus width is equivalent to the combined bank widths. A simple switching means, operating under processor control, reconfigures the memory on the fly.

Address:

1442 Sierraville Ave, San Jose, CA 95132

Phone:

(408)2584889

VIN:

WBAWB73507PV82085

Make:

BMW

Model:

3 SERIES

Year:

2007