Dean L. Field - Graham WA Larry Lynn Hinton - Bothell WA John Kizziar, III - Cheyenne WY
Assignee:
Cypress Semiconductor Corp. - San Jose CA
International Classification:
H03L 706
US Classification:
327156, 327157, 327 42, 327142
Abstract:
An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to receive a device input signal. The apparatus may be configured to perform a predefined function in response to the device input signal during normal operation. The second circuit may be configured to determine when the device input signal is invalid according to a predetermined parameter. The second circuit may be configured to generate a function control signal in response to the predetermined parameter. The function control signal may be configured to direct the apparatus to perform a second predetermined function. The second predetermined function may be different than the first predetermined function.
Integrated Circuit Having One Or More Conductive Devices Formed Over A Saw And/Or Mems Device
Dean L. Field - Graham WA, US Charles N. Stone - Leander TX, US Michael W. Bruner - Saratoga CA, US
Assignee:
Cypress Semiconductor Corporation - San Jose CA
International Classification:
H01L 29/78
US Classification:
257416, 257414, 310313 R, 310313 B
Abstract:
An integrated circuit is provided which includes one or more device elements formed above a base substrate, a structure forming a sealed cavity above at least a portion of the one or more device elements, and one or more conductive devices formed above the sealed cavity. A method for fabrication of such an integrated circuit is also provided. An exemplary embodiment of the integrated circuit includes a surface acoustic wave device having a plurality of tracks each with a first interdigitated transducer configured to convert a receiving electric field energy into mechanical wave energy and a second interdigitated transducer configured to convert the mechanical wave energy into an output electric field energy. The SAW device also includes a conductor arranged above and spanning across at least two tracks of the plurality of tracks and coupled to the first interdigitated transducers of at least the two tracks.
Method And Circuit For Reducing Power And/Or Current Consumption
DEAN L. FIELD - GRAHAM WA, US LARRY LYNN HINTON - BOTHELL WA, US JOHN KIZZIAR - CHEYENNE WY, US
International Classification:
H03B001/00
US Classification:
327/108000
Abstract:
An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to receive a device input signal. The apparatus may be configured to perform a predefined function in response to the device input signal during normal operation. The second circuit may be configured to determine when the device input signal is invalid according to a predetermined parameter. The second circuit may be configured to generate a function control signal in response to the predetermined parameter. The function control signal may be configured to direct the apparatus to perform a second predetermined function. The second predetermined function may be different than the first predetermined function.
Method And Circuit For Reducing Power And/Or Current Consumption
Dean L. Field - Graham WA Larry Lynn Hinton - Bothell WA John Kizziar - Cheyenne WY
Assignee:
Cypress Semiconductor Corp. - San Jose CA
International Classification:
H03L 706
US Classification:
327156
Abstract:
A semiconductor device (e. g. , a zero-delay buffer) is provided which is capable of reducing current or power consumption without the use of a dedicated pin. The device may include a frequency detector that receives a detector input signal corresponding to or derived from a device input signal. The device input signal performs a first function during normal operation of the device. The detector determines whether the frequency of the detector input signal is less than a predetermined minimum, and if so, generates a power down signal configured to direct the device to reduce current or power consumption in at least one of its component circuits. The frequency detector may include a "one-shot" circuit responsive to the detector input signal for generating a frequency indicator signal, and a "power down" signal output circuit responsive to the frequency indicator signal for generating the power down signal.
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