Dilip C Patel

US Patent:

61390798, Oct 31, 2000

Filed:

Oct 20, 1997

Appl. No.:

8/954241

Inventors:

Dilip Patel - Mesa AZ
Jeffrey A. Miks - Chandler AZ
Dwight L. Daniels - Mesa AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

B05C 100
B23K 306

US Classification:

294 871

Abstract:

A transport head (10) and a method for transporting flux and solder balls (50) to locations for bonding pads (46) on a workpiece (44). To transfer flux, a first pattern definition mask (12) is attached to the transport head (10) and allows selector pins (64) to fully extend and receive flux for transport to the bonding pads (46) on the substrate (44). To transfer the solder balls (50), pattern definition mask (12) attached to the transport head (10) defines locations that are to be populated with the solder balls (50). The transport head (10) transfers the solder balls (50) to the bonding pads (46) of the substrate (44).

US Patent:

59030518, May 11, 1999

Filed:

Apr 3, 1998

Appl. No.:

9/055120

Inventors:

Jeffrey A. Miks - Chandler AZ
Dilip D. Patel - Mesa AZ
Dwight L. Daniels - Mesa AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H01L23/053;23/48;23/52

US Classification:

257700

Abstract:

An electronic component can be more easily tested after being mounted onto a circuit board (660). The component also stops cracks from propagating over vital areas of a substrate (110). The component includes an electrically insulative substrate (100), electrically conductive traces (120) supported by the electrically insulative substrate (100), and an electrically insulative layer (310) covering inner and outer portions of the electrically conductive traces (120) while middle portions of the electrically conductive traces (120) remain exposed.

US Patent:

62011863, Mar 13, 2001

Filed:

Jun 29, 1998

Appl. No.:

9/106552

Inventors:

Dwight L. Daniels - Mesa AZ
Jeffrey A. Miks - Chandler AZ
Dilip Patel - Mesa AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H01L 2328

US Classification:

174 524

Abstract:

An electronic component assembly (10) is formed by mounting an electronic component (15) to the leads (12) of a leadframe (18). The portions of the leadframe (18) that come in physical contact with the electronic component (15) are electrically connected to the electronic component with bonding wires (31) or by placing the bonding regions (30) of the electronic component (15) in direct physical contact with the tips (35) of the leads (12). A package (20) is used to encapsulate the leads (12) and the electronic component (15).

US Patent:

61035483, Aug 15, 2000

Filed:

Sep 17, 1997

Appl. No.:

8/931982

Inventors:

Jeffrey A. Miks - Chandler AZ
Dilip Patel - Mesa AZ
Dwight L. Daniels - Mesa AZ
Stephen C. St. Germain - Scottsdale AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H01L 2120

US Classification:

438106

Abstract:

A semiconductor device includes a substrate (10) that can be cut into different sizes. A plurality of wirebond fingers (12) are formed on a top surface (13) of the substrate (10). The plurality of wirebond fingers (12) are located within concentric interconnect regions (23, 25, 27, 29, 31, 33, 35) and electrically connected to a via (14) by a signal interconnect line (11). The size of substrate (10) can be altered by cutting the substrate (10) to remove any of the interconnect regions (23, 25, 27, 29, 31, 33, 35). A semiconductor component (44) attached to the top side (13) of the substrate (10) can have a die pad (48) wirebonded to any of the plurality of wirebond fingers (12) located along the signal interconnect line (11) for connection to the via (14).