Don Leslie Kendall - Richardson TX Millard Monroe Judy - Dallas TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01C 706 H01L 2702 H01L 2906
US Classification:
338 9
Abstract:
Disclosed is a method for providing electronic semiconductor devices and the devices produced thereby utilizing an orientation dependent etch to selectively provide grooves in a monocrystalline silicon substrate having a crystal orientation of (110). By selectively etching with an orientation dependent etch to provide deep grooves having substantially parallel sidewalls and thereafter refilling with an appropriate material of the appropriate conductivity, a plurality of semiconductor electronic devices are provided.
Walter T. Matzen - Richardson TX Don L. Kendall - Richardson TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01C 704
US Classification:
338 22SD
Abstract:
A spreading-resistance silicon thermistor having high-precision values of resistance and temperature coefficient of resistance (TCR) is produced by a high-volume, low-cost, photolithographic technique, wherein multiple thin-film contacts are tested and selectively trimmed to permit computerized control of precision resistance values in a production-line operation.
Don L. Kendall - Richardson TX Walter T. Matzen - Richardson TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01L 2993
US Classification:
357 14
Abstract:
Disclosed is a semiconductor capacitor which utilizes the volume of the semiconductor substrate in which it is formed to create increased surface area and thereby to provide increased capacitance. The surface area is increased by forming selectively spaced grooves in the surface of the semiconductor substrate and utilizing the sidewalls of the grooves as surface. A thin layer of dielectric is formed over the increased surface area, and thereafter a metal layer is formed over the dielectric layer to provide a dielectric capacitor. An active junction P-N capacitor may be formed instead of a dielectric capacitor by forming a P-N junction comprising the increased surface area, and thereover forming the metallized contact.
Don L. Kendall - Richardson TX Walter T. Matzen - Richardson TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01L 2704 H01L 2904 H01L 2992
US Classification:
357 51
Abstract:
Disclosed is a semiconductor capacitor which utilizes the volume of the semiconductor substrate in which it is formed to create increased surface area and thereby to provide increased capacitance. The surface area is increased by forming selectively spaced grooves in the surface of the semiconductor substrate by orientation dependent etches and utilizing the sidewalls of the grooves as surface. Groove depth is limited to a predetermined value by etching time, geometrical constraints, or by etch stops. This provides for precise control of capacitance values on a batch or commercial basis. Increases up to at least 100-fold in capacitance as compared to a flat capacitor structure as possible. A thin layer of dielectric is formed over the increased surface area, and thereafter a conducting layer is formed over the dielectric layer to provide a dielectric capacitor. An active junction P-N capacitor may also be formed.
Don Leslie Kendall - Richardson TX Francois Antoine Padovani - Dallas TX Kenneth Elwood Bean - Richardson TX Walter Theodore Matzen - Richardson TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01L 2904 H01L 3106 H01L 2120 H01L 21308
US Classification:
357 30
Abstract:
Disclosed is a method of fabricating a vertical multi-junction cell and the solar cell produced thereby, utilizing an orientation dependent etch to selectively provide parallel grooves in monocrystalline silicon body, followed by the introduction of doping impurities of the opposite conductivity type from the silicon body to provide PN junctions. In some instances the grooves are filled with silicon of the same conductivity type as the silicon body.
Integral Honeycomb-Like Support Of Very Thin Single Crystal Slices
Don Leslie Kendall - Richardson TX John C. Knowles - Dallas TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H01L 2120
US Classification:
148187
Abstract:
The disclosure relates to the formation of very thin silicon slices, 1/10 of a mil, and the mechanical strengthening of such thin silicon slices and to the formation of electronic circuitry in such slices and the use thereof. These slices are formed, in accordance with one embodiment of the invention, by etching grooves in an n+ wafer using an orientation dependent etch and etching along the {111} plane in {110} n+ wafers. After oxide removal, the surface of the wafer opposite the grooves is epitaxially coated with n-type silicon and the original grooves are then further etched by an electrolytic etch or by a concentration dependent etch which will remove only the n+ material, thereby leaving the thin wafer with a honeycomb-like supporting structure with struts in the shapes of parallelograms, diamonds and the like. The thin slice can be used to purify electron beams since, for given energies, only ions passing in the direction of the lattice structure or along the channel will completely pass through the slice, the other ions being stopped by collisions with the atoms of the silicon slice. The slice can also be used as a channel multiplier since light impinging on the slice will generate electrons which will pass between struts or honeycomb-like members and gradually pick up additional electrons by secondary emission.