Donald R Camp

US Patent:

6930929, Aug 16, 2005

Filed:

Nov 4, 2002

Appl. No.:

10/288553

Inventors:

Richard Alexander Erhart - Tempe AZ, US
Arif Alam - Chandler AZ, US
Christopher A. Ludden - Pittsford NY, US
Bruce C. Moore - Glendale AZ, US
Donald Camp - Peoria AZ, US

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

G11C008/12
G09G005/397

US Classification:

36518904, 365220, 365219, 36518902, 36523003, 345547, 345560

Abstract:

An improved memory for graphics displays includes an improved memory cell. Data may be written and read from the single bit cell simultaneously, eliminating the need for additional memory circuits to service an N column driver for a display. Additionally, the architecture of the memory allows for a signal input port for writing the data to the cell while allowing for multiple parallel output ports for reading the data. The unique architecture eliminates the need for addressing logic and refresh circuitry for display applications.

US Patent:

6954201, Oct 11, 2005

Filed:

Nov 6, 2002

Appl. No.:

10/289471

Inventors:

Christopher A. Ludden - Pittsford NY, US
Donald E. Camp - Peoria AZ, US
Richard Alexander Erhart - Tempe AZ, US
Bruce C. Moore - Glendale AZ, US
Mark Kuhns - Peoria AZ, US

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

G09G005/00

US Classification:

345204, 345214, 345215

Abstract:

The present invention provides a point-to-point data bus architecture and a protocol for a graphics system. The TCON transmits the data to the column drivers using separate point-to-point data buses. Data may be transmitted to the column drivers during a horizontal blanking period resulting in more data being written to the column drivers as compared to a typical graphical display system. As each point-to-point data bus contains only the data for its corresponding column driver the instantaneous data rate to any column driver is lower than in conventional multi-drop architectures. The point-to-point system has fewer printed circuit board (PCB) lines and a lower loop area than a conventional multi-drop system. A protocol may also be implemented. The protocol may provide for system level control and coordination of column drivers and other display system components.

US Patent:

7095407, Aug 22, 2006

Filed:

Apr 25, 2003

Appl. No.:

10/424223

Inventors:

Richard Alexander Erhart - Tempe AZ, US
Bruce C. Moore - Glendale AZ, US
Donald E. Camp - Peoria AZ, US
Mark Kuhns - Peoria AZ, US

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

G06G 5/00

US Classification:

345213, 345204

Abstract:

The present invention is related to staggering data to reduce noise in a graphics display system. Line-to-line data staggering is achieved by staggering the starting point at which data is transmitted within each line of data. Frame-to-frame staggering is implemented by staggering the starting point of the first line of data from its value in the previous frame by a predetermined value each frame. Alternatively, frame-to-frame data staggering can be performed every other frame instead of every frame.

US Patent:

7180491, Feb 20, 2007

Filed:

Oct 8, 2002

Appl. No.:

10/268055

Inventors:

Bruce C. Moore - Glendale AZ, US
Richard Alexander Erhart - Tempe AZ, US
Donald E. Camp - Peoria AZ, US
Mark Kuhns - Peoria AZ, US

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

G09G 3/36

US Classification:

345 89, 345 87, 345 58, 345 98, 345 99, 345204, 345208, 345213, 348510, 348511, 348512, 348516

Abstract:

A false DE rejection system is described. DEs are ignored during a programmable vertical lockout period. Internal timing is used during the vertical lockout period to count the number of vertical lines to ignore. The first DE received after the vertical lockout period signifies the start of the next graphics frame. Default video is output during the vertical lockout period. The TCON is synchronized to the start of the graphics frame. A horizontal line length timer measures the timing for the horizontal line length. The horizontal line length timer may also keep a moving average of all of the lines that it has measured. This helps to ensure that the TCON does not get out-of-sync with the input stream during the vertical blanking periods. The DE rejection system includes automatic blanking detection that ignores DEs that occur after the end of a predetermined graphics frame. The vertical lockout does not occur until there has been no DE for an entire line.

US Patent:

7336268, Feb 26, 2008

Filed:

Oct 30, 2002

Appl. No.:

10/285243

Inventors:

Donald E. Camp - Peoria AZ, US
Mark D. Kuhns - Peoria AZ, US
Randy J. Dahl - Glendale AZ, US
Osama F. Alborno - Chandler AZ, US

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

G09G 5/00

US Classification:

345204, 345205, 345206, 345210, 345211

Abstract:

An exemplary point-to-point display system comprises a host system, a timing controller, and a display. The host system is configured to provide data for display. The timing controller is configurable to provide data swapping, bus swapping, bit swapping, and combinations thereof to provide arranged data in response to the provided data. The display is configured to display the arranged data.