Donald H Chiu

US Patent:

7213803, May 8, 2007

Filed:

Jan 24, 2005

Appl. No.:

11/041670

Inventors:

Donald Wai-Chung Chiu - Sunnyvale CA, US

Assignee:

Verigy Pte. Ltd. - Singapore

International Classification:

B23Q 3/08

US Classification:

269 24, 269 25

Abstract:

A clamp having a frame and a latch member mounted within the frame so that the latch member is translatable along a displacement axis and rotatable about the displacement axis. A guide pin mounted to the frame engages a channel operatively associated with the latch member. An actuator mounted to the frame and operatively associated with the latch member translates the latch member along the displacement axis. The engagement of the guide pin and channel causes the latch member to be rotated about the displacement axis as the latch member is translated along the displacement axis.

US Patent:

7934710, May 3, 2011

Filed:

Apr 11, 2007

Appl. No.:

11/734187

Inventors:

Donald Wai-Chung Chiu - Santa Clara CA, US

Assignee:

Verigy (Singapore) Pte. Ltd. - Singapore

International Classification:

B23Q 3/08

US Classification:

269 24, 269 32, 269 27

Abstract:

In an embodiment, there is disclosed a clamp having a frame and a latch member mounted within the housing so that the latch member is translatable along a displacement axis and rotatable about the displacement axis. A cam follower mounted to the frame engages a channel operatively associated with the latch member. An actuator mounted to the frame and operatively associated with the latch member translates the latch member along the displacement axis. The engagement of the cam follower and channel causes the latch member to be rotated about the displacement axis as the latch member is translated along the displacement axis.

US Patent:

8354853, Jan 15, 2013

Filed:

Nov 25, 2009

Appl. No.:

12/626506

Inventors:

Sanjeev Grover - San Jose CA, US
Donald W. Chiu - Santa Clara CA, US
John W. Andberg - Santa Cruz CA, US

Assignee:

Advantest (Singapore) Pte Ltd - Singapore

International Classification:

G01R 31/00

US Classification:

32475418

Abstract:

In one embodiment, a test system has a set of test electronics for testing a device under test (DUT). The test system also has at least one test electronics to DUT interface having a zero insertion force (ZIF) connector. Each ZIF connector has a ZIF connector to DUT clamping mechanism configured to i) apply a first orthogonal force to a probe card that interfaces with a DUT, by pressing the ZIF connector against the probe card, and simultaneously ii) exert at least one second orthogonal force on the probe card, the at least one second orthogonal force being opposite in direction to the first orthogonal force.

US Patent:

20090255098, Oct 15, 2009

Filed:

Apr 11, 2008

Appl. No.:

12/101807

Inventors:

John William Andberg - Santa Cruz CA, US
Donald Wai-Chung Chiu - Santa Clara CA, US

International Classification:

F16B 2/02

US Classification:

24530

Abstract:

In an embodiment, there is disclosed a clamp, having a housing; a latch member extending from within the housing, and the latch member translatable along a displacement axis; an actuator mounted to the housing and operatively associated with the latch member to translate the latch member along the displacement axis; and a nonlinear biasing member operatively associated with the latch member and the housing, and the nonlinear biasing member positioned to bias the latch member toward a retracted position. Other embodiments are also disclosed.

US Patent:

20130135002, May 30, 2013

Filed:

Jan 15, 2013

Appl. No.:

13/742183

Inventors:

Sanjeev Grover - San Jose CA, US
Donald W. Chiu - Santa Clara CA, US
John W. Andberg - Santa Cruz CA, US

Assignee:

ADVANTEST (SINGAPORE) PTE LTD - SINGAPORE

International Classification:

G01R 31/26

US Classification:

32475602

Abstract:

In one embodiment, an interface includes a plurality of test electronics to DUT interfaces. Each test electronics to DUT interface has at least one test electronics interface, at least one DUT interface, and an electrical coupling between the at least one test electronics interface and the at least one DUT interface. First and second subsets of the DUT interfaces are respectively positioned along the perimeters of first and second concentric shapes.