Doni E Parnell

age ~61

from Golden, TX

Get Report

Also known as:

Doni Ellen Parnell
Doni M Parnell
Doni Ellen Mcafoose
Doni E Tschirhart
Doni Parnell Mcafoose
Donna Darnell

Connected to:

Doni Parnell Phones & Addresses

Golden, TX
Mineola, TX
Westbrook, ME
Fort Collins, CO
Albany, NY
Clifton Park, NY
Austin, TX
Dallas, TX
San Antonio, TX

Work

Company:

Tokyo electron
Oct 2012
Address:

Brussels Area, Belgium
Position:

Etch process engineer

Education

Degree:

BS
School / High School:

The University of Texas at San Antonio
1995
Specialities:

Biology, Chemistry

Skills

Process Engineering • Semiconductors • Manufacturing • Process Improvement • Spc • Semiconductor Industry • Design of Experiments • Product Development • Cross Functional Team Leadership • Project Management • Failure Analysis • Six Sigma • Product Management • Electronics • Thin Films • Materials Science • Jmp • Silicon • Nanotechnology • Management • Process Simulation • Metrology • Process Integration • R&D • Sales • Lean Manufacturing • Engineering Management • Engineering • Leadership • Ic • Etching • Strategic Planning • Start Ups • Characterization • Yield • Statistical Process Control • Continuous Improvement • Cvd • Medical Devices • New Business Development • Root Cause Analysis • Fmea • Integration • Project Planning • Troubleshooting

Industries

Semiconductors

Resumes

Etch Process Engineer

view source

Location:

Albany, NY

Industry:

Semiconductors

Work:

Tokyo Electron - Brussels Area, Belgium since Oct 2012
Etch Process Engineer
GLOBALFOUNDRIES Jan 2011 - Oct 2012
MTS Process Engineer, CFM
Tokyo Electron Apr 2010 - Jan 2011
Senior Process Engineer
The Scooter Store Nov 2007 - Apr 2010
Director
Samsung Austin Semiconductor Apr 1996 - Oct 2007
Senior Manager

Education:

The University of Texas at San Antonio 1995
BS, Biology, Chemistry

Skills:

Process Engineering
Semiconductors
Manufacturing
Process Improvement
Spc
Semiconductor Industry
Design of Experiments
Product Development
Cross Functional Team Leadership
Project Management
Failure Analysis
Six Sigma
Product Management
Electronics
Thin Films
Materials Science
Jmp
Silicon
Nanotechnology
Management
Process Simulation
Metrology
Process Integration
R&D
Sales
Lean Manufacturing
Engineering Management
Engineering
Leadership
Ic
Etching
Strategic Planning
Start Ups
Characterization
Yield
Statistical Process Control
Continuous Improvement
Cvd
Medical Devices
New Business Development
Root Cause Analysis
Fmea
Integration
Project Planning
Troubleshooting

Us Patents

Method And System For Performing Post-Etch Annealing Of A Workpiece
view source
US Patent:

20150214473, Jul 30, 2015
Filed:

Jan 12, 2015
Appl. No.:

14/594378
Inventors:

- Tokyo, JP
Doni Parnell - Albany NY, US
Shigeru Tahara - Auderghem, BE
Toru Ishii - Dublin, IE
International Classification:

H01L 43/12
Abstract:

A method for performing post-etch annealing of a workpiece in an annealing system is described. In particular, the method includes disposing one or more workpieces in an annealing system, each of the one or more workpieces having a multilayer stack of thin films that has been patterned using an etching process sequence to form an electronic device characterized by a cell critical dimension (CD), wherein the multilayer stack of thin films includes at least one patterned layer containing magnetic material. Thereafter, the patterned layer containing magnetic material on the one or more workpieces is annealed in the annealing system via an anneal process condition, wherein the anneal process condition is selected to adjust a property of the patterned layer containing magnetic material.