Dung V Tran

US Patent:

6728140, Apr 27, 2004

Filed:

Dec 5, 2001

Appl. No.:

10/011157

Inventors:

Kyung Joon Han - Palo Alto CA
Joo Weon Park - Pleasanton CA
Dung Tran - San Jose CA
Steve K. Hsia - San Jose CA
Jong Seuk Lee - Palo Alto CA
Dae Hyun Kim - Fremont CA

Assignee:

NexFlash Technologies, Inc. - San Jose CA

International Classification:

G11C 1604

US Classification:

36518524, 36518526, 3651853, 36518529

Abstract:

A convergence signal includes a series of voltage pulses used to perform a convergence procedure in one or more flash EEPROM memory cells (transistors). In one instance subsequent voltage pulses in the convergence signal each have a higher voltage than the preceding pulse. In another instance, subsequent voltage pulses in the convergence signal each have a longer duration than the preceding pulse. An integrated circuit includes an array of memory cells and an erase control unit which controls the application of the convergence signal to one or more memory cells. The integrated circuit may be either serial or parallel flash EEPROM in which bulk, sector, or page mode erasing is used.

US Patent:

6731544, May 4, 2004

Filed:

Nov 8, 2001

Appl. No.:

10/039518

Inventors:

Kyung Joon Han - Palo Alto CA
Dung Tran - San Jose CA
Steven W. Longcor - Mountain View CA
Steve K. Hsia - San Jose CA

Assignee:

NexFlash Technologies, Inc. - San Jose CA

International Classification:

G11C 1604

US Classification:

36518528, 36518717, 36518518

Abstract:

A memory array contains memory cells designed to be erased using Fowler-Nordheim (âFNâ) tunneling through the channel area, and programmed using either channel hot electron injection (âCHEâ) or channel-initiated secondary electron injection (âCISEIâ). To reduce disturbance of the floating gate potential of unselected memory cells during programming operations and read operations, the unselected word lines are brought to a negative potential rather than ground potential. To reduce disturbance of the floating gate potential of unselected memory cells during FN erase operations, the unselected word lines are brought to a positive potential rather than ground potential.

US Patent:

60207434, Feb 1, 2000

Filed:

Oct 21, 1997

Appl. No.:

8/955433

Inventors:

Larry D. Reeves - Palo Alto CA
Dung A. Tran - San Jose CA

Assignee:

Compaq Computer Corporation - Cupertino CA

International Classification:

G01N 27416

US Classification:

324434

Abstract:

A technique for detecting failed batteries while the battery is attached to one or more electronic devices and is receiving a float charge is disclosed. The float voltage minimizes the normal voltage differences between battery cells. The technique employs a ratio comparative analysis of cell voltages of a battery provided across the terminals of the battery. Application of the ratio comparative analysis in assessing the condition of a battery assumes an equal voltage drop across each battery cell such that the cells are modeled as a series of resisters with respect to the float voltage. Such equal voltage drop enables a comparative ratio analysis of the voltage across each of the two portions of the battery's cell stack to the voltage across the entire battery. The comparative ratio analysis determines a voltage threshold that identifies whether a battery has a shorted or open cell.

US Patent:

20230020630, Jan 19, 2023

Filed:

Jul 6, 2022

Appl. No.:

17/858936

Inventors:

- San Leandro CA, US
Azam Mihir Thatte - Kensington CA, US
Dung Le Tran - Castro Valley CA, US
Michael Kjelson - Dallas TX, US
Alexander Patrick Theodossiou - Alameda CA, US
Matthew Joseph Pattom - Fremont CA, US
Farshad Ghasripoor - Oakland CA, US

International Classification:

F15B 3/00
F15B 5/00

Abstract:

A pressure exchanger includes a rotor forming a duct from a first duct opening to a second duct opening. The pressure exchanger further includes a floating piston configured to move within the duct between the first duct opening and the second duct opening to prevent mixing of a first fluid and a second fluid while exchanging pressure between the first fluid and the second fluid. The pressure exchanger further includes a first adapter plate configured to prevent the floating piston from exiting the duct at the first duct opening and a second adapter plate configured to prevent the floating piston from exiting the duct at the second duct opening. The first adapter plate forms a first aperture that directs the first fluid to the first duct opening and the second adapter plate forms a second aperture that directs the second fluid to the second duct opening.