Edward N Jeffrey

US Patent:

6353298, Mar 5, 2002

Filed:

Apr 11, 2001

Appl. No.:

09/681459

Inventors:

Edward N. Jeffrey - Garland TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G11B 548

US Classification:

318293, 360 75, 369 4436, 330146, 330274

Abstract:

A circuit ( ) and method for applying drive voltages to a voice coil motor (VCM) ( ) of a mass data storage device ( ) has two driver sets, each having a high side driver (HSD) ( ) and a low side driver (LSD) ( ) connected to the VCM ( ). Each driver set has two SENSEFETs ( ), each having a power FET and a sense FET. A circuit ( ) is provided for sensing a sense current in the sense FET of the LSD, and a circuit ( ) is provided for increasing the bias on the gates of the SENSEFET ( ) in the LSD when the sense current falls below a predetermined level (VREF). Also, a circuit ( ) is provided for driving a predetermined current in the SENSEFET of the HSD when the sense current falls below the predetermined level. Thus, a current at the predetermined level always flows in the SENSEFETs ( ).

US Patent:

6548973, Apr 15, 2003

Filed:

Jan 8, 1998

Appl. No.:

09/004399

Inventors:

James E. Chloupek - Plano TX
Edward N. Jeffrey - Garland TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H02P 314

US Classification:

318375

Abstract:

A circuit ( ) for braking a polyphase dc motor ( ) includes a circuit ( ) for producing an output signal indicating that the motor has slowed at least to an actual rotational speed and a braking circuit ( ) to brake the motor ( ) when the output signal indicates that the motor has slowed at least to an actual rotational speed. The circuit ( ) for producing an output signal indicating that the motor ( ) has slowed at least to an actual rotational speed includes a first counter ( ) for counting pulses of a speed signal, which may be a standard tach signal. The first counter ( ) produces a first output when the first counter ( ) reaches a first predetermined pulse count. A second counter ( ) counts clock pulses from a clock generator ( ) to produce a second output when the second counter ( ) reaches a second predetermined pulse count. The first output is connected to restart the first ( ) and second ( ) counters, and the second output provides an indication when the frequency of the speed signal is lower than a desired ratio to the clock pulse frequency.

US Patent:

46864490, Aug 11, 1987

Filed:

Apr 7, 1986

Appl. No.:

6/853311

Inventors:

Edward N. Jeffrey - Richardson TX

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

G05F 318

US Classification:

323231

Abstract:

A JFET current source compensates for variations in the voltage supply to intain a constant current level at its output terminal. Series connected diodes are used as voltage dividers in conjunction with a second JFET to establish the gate voltage of a third JFET that is connected in series with the first JFET. The constant current output is taken at the drain electrode of the third JFET.

US Patent:

60086114, Dec 28, 1999

Filed:

Nov 20, 1998

Appl. No.:

9/196788

Inventors:

Hao Chen - Plano TX
Edward N. Jeffrey - Garland TX
Fredrick W. Trafton - Lewisville TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G05B 1128

US Classification:

318599

Abstract:

A method of driving an electric motor includes generating a periodic, driving voltage. The driving voltage comprises a sequence of first, second, and third waveforms. The first waveform in the sequence is a generally constant, high voltage. The second waveform in the sequence is a down hook voltage. The third waveform in the sequence is an up hook voltage. The method also includes applying the driving voltage to a coil of the motor to generate a generally sinusoidal current through the coil of the motor.

US Patent:

62082809, Mar 27, 2001

Filed:

Jun 4, 1999

Appl. No.:

9/326172

Inventors:

John M. Baker - Tuttle OK
Edward N. Jeffrey - Garland TX
Robert Whyte - Dallas TX

Assignee:

Seagate Technology LLC - Scotts Valley CA

International Classification:

H03M1/66

US Classification:

341152

Abstract:

An apparatus and method for converting a pulse-width modulation (PWM) signal to an analog voltage signal. A current source is provided to supply electrical charge at a controllable rate to a ramp capacitor which, during successively occurring cycles of the PWM signal, alternatively receives electrical charge from the current source and discharges previously received electrical charge. A first sampling capacitor receives electrical charge from the ramp capacitor to output a feedback voltage to a feedback circuit to adjust the rate of electrical charge supplied by the current source, with the charge transferred to the first sampling capacitor determined in relation to the charge stored on the ramp capacitor over an entire PWM cycle. A second sampling capacitor receives electrical charge from the ramp capacitor to output the analog voltage, with the charge transferred to the second sampling capacitor determined in relation to the duty cycle of the PWM signal.

US Patent:

6021015, Feb 1, 2000

Filed:

May 21, 1997

Appl. No.:

8/861251

Inventors:

Edward N. Jeffrey - Garland TX
William R. Krenik - Garland TX
David Cotton - Plano TX
Dennis V. Hahn - Plano TX
Shaibal Barua - Dallas TX
Roy C. Jones - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G11B 1518

US Classification:

360 69

Abstract:

A system for driving hard disk drive spindle and actuator motors is disclosed. The system comprises a spindle motor control circuit (120), a spindle motor power circuit (210), an actuator motor control circuit (110), and an actuator motor power circuit (210). The spindle motor control circuit (120) and the actuator motor control circuit (110) are formed on a first substrate (100). The spindle motor power circuit (210) and the actuator motor power circuit (220) are formed on a second substrate (200). The system also includes at least one disk (22) attached to a rotatable spindle (21), a spindle motor (400) for receiving and being energized by the spindle motor power signals, and for controlling the rotation of the spindle (21), a plurality of disk read heads (12) adjacent to the disks (22), and an actuator motor (300) for receiving and being energized by the actuator motor power signals, and for controlling the position of the disk read heads (12).

US Patent:

58084380, Sep 15, 1998

Filed:

Aug 28, 1997

Appl. No.:

8/919867

Inventors:

Edward N. Jeffrey - Garland TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G11B 2102

US Classification:

318634

Abstract:

A method and system for limiting current in a read/write head retract circuit is disclosed. The system includes a temperature sensor (75) for sensing a temperature of the disk drive read/write head retract circuit (53). The temperature sensor (75) generates an output signal indicating whether the temperature is above or below a threshold temperature. The system also includes a voltage regulator (100) which applies a voltage to an actuator motor (54). The voltage regulator (100) receives an input signal operatively associated with the output signal of the temperature sensor (75), and adjusts the voltage applied to the actuator motor (54) in response to the input signal. In one embodiment, the system includes a hysteresis circuit (88) which adjusts the threshold temperature of the temperature sensor (75) when the temperature sensor output changes. The hysteresis circuit (88) prevents the system from oscillating rapidly around the threshold temperature of the temperature sensor (75), and thereby avoids unnecessary wear of the system components.