Elizabeth Pia Richard

US Patent:

7818468, Oct 19, 2010

Filed:

Jun 29, 2008

Appl. No.:

12/164070

Inventors:

Elizabeth Anne Richard - Plano TX, US
Sumit Rupri Das - Richardson TX, US
Paul Timothy Howard - Richardson TX, US
Scott Adam Morrison - Richardson TX, US
Pradipkuma A. Thaker - Hilliard OH, US
Roy David Wojciechowski - Round Rock TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G06F 3/00

US Classification:

710 10, 710306, 710105

Abstract:

In one aspect, an integrated circuit device including a first-level module configurable to receive and transmit control information, said first level module including a first sub-level module, a second sub-level module operably coupleable to the first sub-level module, and a third sub-level module operably coupleable to the second module; and a second-level module operably coupleable to the first-level module is disclosed.

US Patent:

8015476, Sep 6, 2011

Filed:

Jul 17, 2007

Appl. No.:

11/778860

Inventors:

Elizabeth Anne Richard - Plano TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H03M 13/03

US Classification:

714793, 714796, 714758

Abstract:

A sequence of cyclic redundancy check syndromes can be produced based on a received sequence of sets of parallel data wherein different ones of the sets can have respectively different parallel data widths. Some of the syndromes are produced based on respectively corresponding ones of the sets that each have a first parallel data width. At least one of the syndromes is produced based on a corresponding at least one of the sets that has a second parallel data width that is less than the first parallel data width. The last syndrome of the sequence of syndromes corresponds to all of the data in the received sequence of sets.

US Patent:

8032813, Oct 4, 2011

Filed:

Jul 17, 2007

Appl. No.:

11/778754

Inventors:

Elizabeth Anne Richard - Plano TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H03M 13/00

US Classification:

714757, 714785, 714807, 714819, 714758, 702189

Abstract:

Cyclic redundancy check (CRC) processing is applied to a received sequence of data blocks that are defined by respective sequences of sets of parallel data. For each data block, there is produced a sequence of syndromes that respectively correspond to the sets of parallel data within the data block. The final syndrome in the sequence of syndromes corresponds to all of the data in the data block. The time required for CRC processing can be reduced by concurrently producing first and second ones of the syndromes that respectively correspond to first and second ones of the sets that are respectively contained in first and second ones of the data blocks.

US Patent:

8127211, Feb 28, 2012

Filed:

Jun 20, 2007

Appl. No.:

11/765533

Inventors:

Elizabeth Anne Richard - Plano TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H03M 13/00

US Classification:

714785, 714758, 714807

Abstract:

Cyclic redundancy check processing is applied advantageously to a set of input data that includes an unknown data portion and a data portion that is already known before the unknown data portion becomes available. A syndrome contribution that the already-known data portion contributes to a syndrome for the set of input data is determined before the unknown data portion becomes available. When the unknown data portion becomes available, the syndrome for the set of input data is determined based on the unknown data portion and the syndrome contribution.

US Patent:

20080320365, Dec 25, 2008

Filed:

Jun 20, 2007

Appl. No.:

11/765565

Inventors:

Elizabeth Anne Richard - Plano TX, US

Assignee:

TEXAS INSTRUMENTS INCORPORATED - Dallas TX

International Classification:

G06F 11/10

US Classification:

714758, 714785, 714E11032

Abstract:

An initial syndrome for use by a next-state decoder in a cyclic redundancy check apparatus can be inserted independently of the syndrome feedback path and its associated clock. This eliminates a clock cycle penalty that would otherwise be imposed on an incoming data stream each time the initial syndrome value is inserted.