Eun Hee Lee

US Patent:

20210110243, Apr 15, 2021

Filed:

Oct 10, 2019

Appl. No.:

16/598329

Inventors:

- Houston TX, US
Chris Michael Brueggen - Plano TX, US
Eun Sub Lee - Plano TX, US

International Classification:

G06N 3/063
G06N 5/04
G06F 9/38
G06F 9/52
G06K 9/62

Abstract:

Systems are methods are provided for implementing a deep learning accelerator system interface (DLASI). The DLASI connects an accelerator having a plurality of inference computation units to a memory of the host computer system during an inference operation. The DLASI allows interoperability between a main memory of a host computer, which uses 64 B cache lines, for example, and inference computation units, such as tiles, which are designed with smaller on-die memory using 16-bit words. The DLASI can include several components that function collectively to provide the interface between the server memory and a plurality of tiles. For example, the DLASI can include: a switch connected to the plurality of tiles; a host interface; a bridge connected to the switch and the host interface; and a deep learning accelerator fabric protocol. The fabric protocol can also implement a pipelining scheme which optimizes throughput of the multiple tiles of the accelerator.