Francisco H Leon

US Patent:

8030161, Oct 4, 2011

Filed:

May 15, 2008

Appl. No.:

12/121591

Inventors:

Xiangfeng Duan - Los Angeles CA, US
Jian Chen - Mountain View CA, US
J. Wallace Parce - Palo Alto CA, US
Francisco A. Leon - Palo Alto CA, US

Assignee:

Nanosys, Inc. - Palo Alto CA

International Classification:

H01L 21/336
H01L 29/788

US Classification:

438260, 257317

Abstract:

A nonvolatile memory cell includes a substrate comprising a source, drain, and channel between the source and the drain. A tunnel dielectric layer overlies the channel, and a localized charge storage layer is disposed between the tunnel dielectric layer and a control dielectric layer. A gate electrode has a first surface adjacent to the control dielectric layer, and the first surface includes a midsection and two edge portions. According to one embodiment, the midsection defines a plane, and at least one edge portion extends away from the plane. Preferably, the edge portion extending away from the plane converges toward an opposing second surface of the gate electrode. According to another embodiment, the gate electrode of the nonvolatile memory cell includes a first sublayer and a second sublayer of a different width on the first sublayer.