Daniel Goodman - Lexington MA, US Andrzej Bortkiewicz - Hamilton MA, US Gary D. Alley - Londonderry NH, US Stephen F. Horne - Chelmsford MA, US William M. Holber - Winchester MA, US
Assignee:
Applied Science and Technology, Inc. - Wilmington MA
International Classification:
H05H001/00 C23C016/00
US Classification:
15634528, 15634548, 15634547, 15634541, 118723 E, 118723 I, 118723 MW
Abstract:
The invention features an RF plasma generator. The RF plasma generator includes a variable frequency RF generator, comprising an H-bridge and an RF output. The RF generator generates electromagnetic radiation having a power. The RF plasma generator further includes a matching network that includes at least one variable impedance component. The matching network also includes a first port that is electromagnetically coupled to the output of the RF generator and a second port. The RF plasma generator also includes a load that is electromagnetically coupled to the second port of the matching network, and a plasma chamber for containing a plasma having a power. The plasma chamber is electromagnetically coupled to the load and receives electromagnetic radiation having a power from the load. Adjusting at least one of the frequency of the RF generator and the variable impedance component in the matching network changes the power in the plasma.
Carl O. Bozler - Sudbury MA Gary D. Alley - Londonderry NH William T. Lindley - Lexington MA R. Allen Murphy - Hudson MA
Assignee:
Massachusetts Institute of Technology - Cambridge MA
International Classification:
H01L 2120 H01L 2174 H01L 2195
US Classification:
437 83
Abstract:
A permeable base transistor (30) including a metal base layer (34) embedded in a semiconductor crystal (32) to separate collector (38) and emitter (40) regions and form a Schottky barrier with each is disclosed. The metal base layer has at least one opening (37) through which the crystal semiconductor (32) joins the collector (38) and emitter (40) regions. Ohmic contacts (42,44) are made to the emitter (38) and collector (40) regions. The width of all openings (37) in the base layer (34) is of the order of the zero bias depletion width corresponding to the carrier concentration in the opening. The thickness of the metal layer (34) is in the order of 10% of this zero bias depletion width. As a result, a potential barrier in each opening limits current flow over the lower portion of the bias range. With increasing forward base bias the potential in the openings, which is lower than along the metal of the base layer (34), is lowered sufficiently to permit substantial increase in the barrier limited current flow from the collector (38) to emitter (40).
Semiconductor Embedded Layer Technology Including Permeable Base Transistor
Carl O. Bozler - Sudbury MA Gary D. Alley - Londonderry NH William T. Lindley - Lexington NH R. Allen Murphy - Hudson MA
Assignee:
Massachusetts Institute of Technology - Cambridge MA
International Classification:
H01L 27082 H01L 2900 H01L 27102 H01L 2930
US Classification:
257592
Abstract:
A permeable base transistor (30) including a metal base layer (34) embedded in a semiconductor crystal (32) to separate collector (38) and emitter (40) regions and form a Schottky barrier with each is diclosed. The metal base layer has at least one opening (37) through which the crystal semiconductor (32) joins the collector (38) and emitter (40) regions. Ohmic contacts (42,44) are made to the emitter (38) and collector (40) regions. The width of all openings (37) in the base layer (34) is of the order of the zero bias depletion width corresponding to the carrier concentration in the opening. The thickness of the metal layer (34) is in the order of 10% of this zero bias depletion width. As a result, a potential barrier in each opening limits current flow over the lower portion of the bias range. With increasing forward base bias the potential in the openings, which is lower than along the metal of the base layer (34), is lowered sufficiently to permit substantial increase in the barrier limited current flow from the collector (38) to emitter (40).
Monolithic Single And Double Sideband Mixer Apparatus
Brian J. Clifton - Sudbury MA Gary D. Alley - Londonderry NH
International Classification:
H04B 126
US Classification:
455325
Abstract:
A monolithic mixer which is impedance matched to a fundamental waveguide, utilizes a slot coupler and a coplanar transmission line to apply an RF and local oscillator signal to a Schotty-barrier diode. The dielectric substrate is utilized to create a dielectric surface wave resonance which is utilized by centering a slot coupler with respect thereto, to provide a reactive image termination at the upper sideband and thereby enhance single and double sideband mixer operation. The IF signal which is available at the output of the Schottky-barrier diode is filtered by means of an RF bypass capacitor that is located on the dielectric substrate surface.
Semiconductor Embedded Layer Technology Including Permeable Base Transistor, Fabrication Method
Carl O. Bozler - Sudbury MA Gary D. Alley - Londonderry NH William T. Lindley - Lexington MA R. Allen Murphy - Hudson MA
Assignee:
Massachusetts Institute of Technology - Cambridge MA
International Classification:
H01L 2120 H01L 2174 H01L 2195
US Classification:
29580
Abstract:
A layer of material such as the metal base of a transistor is embedded in single crystal. A layer of the material with small, uniformly dimensioned and uniformly spaced openings is formed on a single crystal substrate, and the single crystal is grown from the exposed portions of the substrate over the layer of material. For best results, the layer of material to be embedded is deposited relative to the crystal orientation to provide a much greater rate of crystal growth laterally across the layer than away from the crystal substrate. The method is particularly useful in fabricating a permeable base transistor having slits formed in the metal base layer. An integrated circuit can be fabricated by forming a pattern of conductive material on a single crystal, that pattern having continuous regions which inhibit further crystal growth and narrow regions or regions having openings therein which permit lateral crystal growth across those regions. In that way, the conductive pattern is selectively embedded with the continuous regions left exposed after crystal growth. Connections can be made between the exposed regions and a pattern on the new crystal layer.
Intermodulation Distortion Reduction Method And Apparatus
Gary Dale Alley - Londonderry NH Yen-Long Kuo - Andover MA
Assignee:
Lucent Technologies Inc - Murray Hill NJ
International Classification:
H04H 102 H04N 710 H04J 1500
US Classification:
455 61
Abstract:
A method and apparatus for providing spectral control of intermodulation products in communications systems to reduce the distorting and interfering effects of system nonlinearities. The method provides a technique which controls the phases of video carriers in order to minimize second and third order intermodulation distortion products both in-band and out-of-band.
Brian J. Clifton - Sudbury MA Gary D. Alley - Londonderry NH Ralph A. Murphy - Hudson MA
Assignee:
The United States of America as represented by the Secretary of the Air Force - Washington DC
International Classification:
H04B 126
US Classification:
455327
Abstract:
An integrated circuit mixer which is impedance matched to a fundamental waveguide, utilizes a slot coupler and a coplanar transmission line to apply an RF and local oscillator signal to a Schottky-barrier diode. The IF signal which is available at the output of the Schottky-barrier diode is filtered by means of an RF bypass capacitor that is located on the dielectric substrate surface. At 110 GHz, a mixer module when mounted in the end of a waveguide horn, has an uncooled double-sideband (DSB) mixer noise temperature of 339. degree. K. and conversion loss of 3. 8 dB.