Abstract:
Systems and methods of converting data streams from one clocking domain to another are described. In one aspect, a clocking domain conversion system includes an input, an output, a routing circuit, and a clock generator. The input is operable to simultaneously load N input bits during each load cycle at an average rate R , wherein N has an integer value of at least 1. The output is operable to simultaneously output M output bits during each output cycle at an average rate R , wherein M has an integer value of at least 1 and MâN. The routing circuit is operable to route the N input bits from the input to the output at a clocking rate R and with a dividing ratio K of the routing circuit data rate relative to the higher of the input and output data rates, given by if The clock generator is operable to generate a clock signal for controlling the routing circuit and characterized by a non-uniform sequence of pulses having an average period T between successive pulses, given by.