Gregory B Kuhn

US Patent:

39691683, Jul 13, 1976

Filed:

Nov 29, 1974

Appl. No.:

5/528363

Inventors:

Gregory L. Kuhn - Tempe AZ

Assignee:

Motorola, Inc. - Chicago IL

International Classification:

H01L 21306

US Classification:

156 17

Abstract:

A process is disclosed for filling grooves, moats, and channels formed by both channel and anisotropic etching techniques. Basically the process is a two-step process to be performed on a wafer in which a channel and/or a moat has been formed. A P+ (boron) doped oxide is placed in the grooves or moats using spinon techniques followed by a uniform deposition of polycrystalline silicon over the entire wafer. Due to the spinning effects the P+ doped oxide is collected mostly in the grooves or moats. The P+ doped oxide that remains outside of the grooves and/or moats is removed using standard photolithographic procedures. The wafer is now heated to a temperature sufficient to drive the boron impurities from the P+ doped oxide into the polycrystalline silicon. A portion of a polycrystalline silicon now becomes heavily P+ doped. The remaining polycrystalline silicon remains undoped.