Helen Yvette Maynard

US Patent:

6541149, Apr 1, 2003

Filed:

Feb 29, 2000

Appl. No.:

09/514494

Inventors:

Helen Louise Maynard - Somerset NJ
Jeremy Patrick Meyers - Springfield NJ

Assignee:

Lucent Technologies Inc. - Murray Hill NJ

International Classification:

H01M 486

US Classification:

429 40, 429 41, 429 44, 427115, 216 43, 430314, 156 60

Abstract:

Improved micro fuel cells suitable for portable electrical devices are provided, and processes for forming such cells. In one embodiment of the invention, silicon substrates are used both as the gas delivery structure for the fuel and the oxidant, and as the current collectors. Such use of silicon is advantageous in that it becomes possible both to utilize micromachining and lithographic techniques to form the desired structures, e. g. , the gas delivery channels, and also to integrate the fuel cell with silicon-based control circuitry. Advantageously, the silicon substrates comprise both gas delivery tunnels and porous silicon gas diffusion regions formed over the tunnels in the surface of the substrate, i. e. , the porous regions over the gas delivery tunnels are integral with the silicon substrate. In another embodiment of the invention, a monolithic structure is employed.

US Patent:

20020004259, Jan 10, 2002

Filed:

Sep 22, 1999

Appl. No.:

09/401409

Inventors:

RUICHEN LIU - WARREN NJ, US
HELEN LOUISE MAYNARD - SOMERSET NJ, US

Assignee:

Lucent Technologies, Inc.

International Classification:

H01L021/44
H01L021/48
H01L021/50
H01L021/4763

US Classification:

438/118000

Abstract:

A process for fabricating a multi-layer interconnect in which an organic low-k material is formed over a topographic substrate. An insulator such as silicon dioxide is formed over the organic low-k material. The insulator is planarized. Contact holes or vias are then etched in the two-layer stack.

US Patent:

56538944, Aug 5, 1997

Filed:

May 19, 1995

Appl. No.:

8/446122

Inventors:

Dale Edward Ibbotson - Bridgewater NJ
Helen Louise Maynard - Summit NJ
Edward Alois Rietman - Madison NJ

Assignee:

Lucent Technologies Inc. - Murray Hill NJ

International Classification:

G01N 2100
H05H 100

US Classification:

216 59

Abstract:

The present invention is predicated upon the fact that a process signature from a plasma process used in fabricating integrated circuits contains information about phenomena which cause variations in the fabrication process such as age of the plasma reactor, densities of the wafers exposed to the plasma, chemistry of the plasma, and concentration of the remaining material. In accordance with the present invention, a method for using neural networks to determine plasma etch end-point times in an integrated circuit fabrication process is disclosed. The end-point time is based on in-situ monitoring of at least two parameters during the plasma etch process. After the neural network is trained to associate a certain condition or set of conditions with the endpoint of the process, the neural network is used to control the process.

US Patent:

62282778, May 8, 2001

Filed:

Oct 14, 1998

Appl. No.:

9/172456

Inventors:

Avinoam Kornblit - Highland Park NJ
Heon Lee - Fishkill NY
Helen Louise Maynard - Menlo Park CA

Assignee:

Lucent Technologies Inc. - Murray Hill NJ

International Classification:

H01L 2166
G01R 3126

US Classification:

216 60

Abstract:

The specification describes an interferometric in-situ end point detection technique for plasma etching in which the end point is predicted before any overetching occurs. It is based on the recognition that the wavelength of the monitoring beam can be selected so that only a single interferometric fringe appears before clearing. Knowing there is only one fringe, detection is simplified and the etching process can be terminated while a finite but small thickness of the layer remains. This allows etching partial thicknesses of layers. It also allows a two step etch process wherein the etch chemistry can be changed to a highly selective etch to complete clearing of the layer.