Hideo W Tamama

US Patent:

20130016783, Jan 17, 2013

Filed:

Jul 12, 2012

Appl. No.:

13/548085

Inventors:

Hyung Joon Kim - McKinney TX, US
Minhua Zhou - Plano TX, US
Akira Osamoto - Plano TX, US
Hideo Tamama - The Colony TX, US

International Classification:

H04N 7/32

US Classification:

37524013, 375E07243

Abstract:

A method for coding unit partitioning in a video encoder is provided that includes performing intra-prediction on each permitted coding unit (CU) in a CU hierarchy of a largest coding unit (LCU) to determine an intra-prediction coding cost for each permitted CU, storing the intra-prediction coding cost for each intra-predicted CU in memory, and performing inter-prediction, prediction mode selection, and CU partition selection on each permitted CU in the CU hierarchy to determine a CU partitioning for encoding the LCU, wherein the stored intra-prediction coding costs for the CUs are used.

US Patent:

20130016787, Jan 17, 2013

Filed:

Jul 12, 2012

Appl. No.:

13/548100

Inventors:

Hyung Joon Kim - McKinney TX, US
Minhua Zhou - Plano TX, US
Akira Osamoto - Plano TX, US
Hideo Tamama - The Colony TX, US

International Classification:

H04N 7/32

US Classification:

37524016, 375E07123

Abstract:

A method for motion estimation is provided that includes determining a first motion vector for a first child coding unit (CU) of a parent CU and a second motion vector for a second child CU of the parent CU, wherein the first child CU, the second child CU, and the parent CU are in a CU hierarchy, wherein the first and second child CUs are smallest size CUs in the CU hierarchy, and wherein a first motion search type is used to determine the first motion vector and the second motion vector, selecting the first and second motion vectors as candidate predictors for the parent CU, selecting a predictor for a prediction unit (PU) of the first parent CU from the candidate predictors, and refining the predictor using a second motion search type to determine a motion vector for the PU.

US Patent:

20220197812, Jun 23, 2022

Filed:

Jan 18, 2022

Appl. No.:

17/578392

Inventors:

- Menlo Park CA, US
Richard Lawrence Greene - Redmond WA, US
Hideo Tamama - Kirkland WA, US

International Classification:

G06F 12/0871
G06F 3/06
G06F 12/02
G06F 12/14

Abstract:

In one embodiment, a system may include a memory unit, a first processing unit configured to write data into a memory region of the memory unit, a second processing unit configured to read data from the memory region, a first control unit configured to control the first processing unit's access to the memory unit and, and a second control unit configured to control the second processing unit's access to the memory unit. The first control unit may be configured to obtain, from the second control unit, a first memory address associated with a data reading process of the second processing unit, receive a write request from the first processing unit, the read request having an associated second memory address, and write data into the memory region based on the write request in response to a determination that the second memory address falls outside of the guarded reading region.

US Patent:

20230044573, Feb 9, 2023

Filed:

Oct 3, 2022

Appl. No.:

17/937742

Inventors:

- Menlo Park CA, US
Richard Lawrence Greene - Kirkland WA, US
Hideo Tamama - Kirkland WA, US

International Classification:

G06F 12/06
G06F 12/02
G06F 13/16
G06F 9/50
G06F 12/0802
G06F 12/14

Abstract:

In one embodiment, one or more control units may store a position tracker associated with a first window of memory blocks and allow a first processing unit to write data within the first window. The control units may receive, from a second processing unit, a request for reading data with a memory-reading address, compare the memory-reading address to a first starting address of the first window, and prevent the second processing unit from reading the data when the memory-reading address is greater than or equal to the first starting address of the first window. The control units may store, when the data writing process is complete, an updated position tracker of a second window of memory blocks and allow the second processing unit to read the data based on a determination that the memory-reading address is less than a second starting address of the second window.

US Patent:

20210281862, Sep 9, 2021

Filed:

May 26, 2021

Appl. No.:

17/330840

Inventors:

- Dallas TX, US
Niraj Nandan - Bengaluru, IN
Hideo Tamama - SanDiego CA, US

International Classification:

H04N 19/176
H04N 19/14
H04N 19/82
H04N 19/86
H04N 19/117

Abstract:

A method of de-blocking filtering a processed video is provided. The processed video includes a plurality of blocks and each block includes a plurality of sub-blocks. A current block of the plurality of blocks includes vertical edges and horizontal edges. The processed video further includes a set of control parameters and reconstructed pixels corresponding to the current block. A boundary strength index is estimated at the vertical edges and at the horizontal edges of the current block. The set of control parameters, the reconstructed pixels corresponding to the current block and partially filtered pixels corresponding to a set of adjacent sub-blocks are loaded. The vertical edges and the horizontal edges of the current block are filtered based on the boundary strength index and the set of control parameters such that a vertical edge of the current block is filtered before filtering at least one horizontal edge of the current block.

US Patent:

20210089446, Mar 25, 2021

Filed:

Sep 25, 2019

Appl. No.:

16/582403

Inventors:

- Menlo Park CA, US
Richard Lawrence Greene - Kirkland WA, US
Hideo Tamama - Kirkland WA, US

International Classification:

G06F 12/06
G06F 12/02
G06F 12/0802
G06F 9/50
G06F 13/16

Abstract:

In one embodiment, one or more control units may store a position tracker associated with a first window of memory blocks and allow a first processing unit to write data within the first window. The control units may receive, from a second processing unit, a request for reading data with a memory-reading address, compare the memory-reading address to a first starting address of the first window, and prevent the second processing unit from reading the data when the memory-reading address is greater than or equal to the first starting address of the first window. The control units may store, when the data writing process is complete, an updated position tracker of a second window of memory blocks and allow the second processing unit to read the data based on a determination that the memory-reading address is less than a second starting address of the second window.

US Patent:

20210089458, Mar 25, 2021

Filed:

Sep 25, 2019

Appl. No.:

16/582374

Inventors:

- Menlo Park CA, US
Richard Lawrence Greene - Kirkland WA, US
Hideo Tamama - Kirkland WA, US

International Classification:

G06F 12/0871
G06F 12/02
G06F 12/14
G06F 3/06

Abstract:

In one embodiment, a system may include a memory unit, a first processing unit configured to write data into a memory region of the memory unit, a second processing unit configured to read data from the memory region, a first control unit configured to control the first processing unit's access to the memory unit and, and a second control unit configured to control the second processing unit's access to the memory unit. The second control unit may be configured to obtain, from the first control unit, a first memory address associated with a data writing process of the first processing unit, receive a read request from the second processing unit, the read request having an associated second memory address, and delay execution of the read request based on a comparison of the first memory address and the second memory address.

US Patent:

20190394472, Dec 26, 2019

Filed:

Sep 9, 2019

Appl. No.:

16/564871

Inventors:

- Dallas TX, US
Niraj Nandan - Bengaluru, IN
Hideo Tamama - SanDiego CA, US

International Classification:

H04N 19/176
H04N 19/14
H04N 19/82
H04N 19/86
H04N 19/117

Abstract:

A method of de-blocking filtering a processed video is provided. The processed video includes a plurality of blocks and each block includes a plurality of sub-blocks. A current block of the plurality of blocks includes vertical edges and horizontal edges. The processed video further includes a set of control parameters and reconstructed pixels corresponding to the current block. A boundary strength index is estimated at the vertical edges and at the horizontal edges of the current block. The set of control parameters, the reconstructed pixels corresponding to the current block and partially filtered pixels corresponding to a set of adjacent sub-blocks are loaded. The vertical edges and the horizontal edges of the current block are filtered based on the boundary strength index and the set of control parameters such that a vertical edge of the current block is filtered before filtering at least one horizontal edge of the current block.