Hingloi Alfred Hung

US Patent:

20140077268, Mar 20, 2014

Filed:

Sep 19, 2012

Appl. No.:

13/622506

Inventors:

Ali Darwish - Overland Park KS, US
Hingloi Alfred Hung - Bethesda MD, US

Assignee:

U.S. Government as represented by the Secretary of the Army - Adelphi MD

International Classification:

H01L 29/73
H01L 21/22
H01L 27/088

US Classification:

257197, 257368, 438510, 257E2706, 257E29174, 257E21135

Abstract:

According to various embodiments, a distributed heating transistor includes: a plurality of active regions where transistor action occurs including a heat source; and at least one inactive region where transistor action does not occur and no heat source is present, wherein adjacent active regions are separated by the at least one inactive region. The distributed heating transistor may be configured as field effect transistors (FETs), and bipolar junction transistors (BJTs). Methods for forming the distributed heating transistors are also provided.

US Patent:

59822503, Nov 9, 1999

Filed:

Nov 26, 1997

Appl. No.:

8/978764

Inventors:

Hingloi A. Hung - Arcadia CA
Randy J. Duprey - Manhattan Beach CA
Raquel T. Villeages - Redondo Beach CA

Assignee:

TWR Inc. - Redondo Beach CA

International Classification:

H01P 5107

US Classification:

333 26

Abstract:

A waveguide to microstrip transition (124) formed in a multi-layer substrate (208) is disclosed. The waveguide to microstrip transition (124) may be incorporated into a hermetically sealed package including a metal base (202), a multi-layer circuit (208), a metal ring (206), and a metal cover (204). The multi-layer circuit (208) has at least a first dielectric layer (230), a second dielectric layer (222), and a first conductive layer (218) disposed between the bottom side of the first dielectric layer (230) and the top side of the second dielectric layer (222). The multi-layer circuit (208) includes a waveguide (234). An electromagnetically reflective material (236) coats the walls of the waveguide (234) to allow signals to propagate by reflection through the waveguide (234) toward the first dielectric layer (230). Plated through vias (126) are located in at least the first dielectric layer (230). The plated through vias (126) are arranged to form an approximate outline around the land region on the first dielectric layer (230).

US Patent:

20170346151, Nov 30, 2017

Filed:

Feb 9, 2017

Appl. No.:

15/428623

Inventors:

- Adelphi MD, US
Hingloi Alfred Hung - Bethesda MD, US

International Classification:

H01P 5/16

Abstract:

A power combiner and divider device includes a first port electrically connected to a first impedance line and a second impedance line; a second port electrically connected to the first impedance line and a coupled line; a third port electrically connected to the second impedance line and the coupled line; a third impedance line electrically connected to the coupled line; and a fourth impedance line electrically connected to each of the third impedance line and the coupled line.

US Patent:

20170171012, Jun 15, 2017

Filed:

Feb 1, 2017

Appl. No.:

15/422219

Inventors:

- Adelphi MD, US
Hingloi Alfred Hung - Bethesda MD, US

International Classification:

H04L 27/34
H04B 1/04

Abstract:

A radio transmitter having a RF signal source. A splitter receives an input signal from the signal source and divides that input signal into two output signals. Alternatively, two signal generators provide the two output signals. These output signals are fed into two phase shifters. A phase control signal is applied to each phase shifter so that the vector sum of the output signals represents the desired amplitude and phase of the desired transmitted signal. The outputs of both phase shifters are both frequency multiplied and amplified before recombining to form the transmitter output signal. Moreover, the outputs can be transmitted separately and combined at the receiver. Alternatively, in the case of two signal sources, the signal paths may be at different transmitter locations.

US Patent:

20150002243, Jan 1, 2015

Filed:

Sep 16, 2014

Appl. No.:

14/487821

Inventors:

- Adelphi MD, US
Hingloi Alfred Hung - Bethesda MD, US

International Classification:

H01P 5/12

US Classification:

333136

Abstract:

Power-dividing and/or power-combining circuits have inputs, outputs, and at least three electrical pathways, with substantially equal input and output reflection coefficients. An electronic device may be provided in each of the pathways. Additionally, isolation circuits or devices can be inserted between signal lines to provide isolation between inputs, in the case of combining, or outputs, in the case of dividing. In one embodiment, multiple phase shift components are electrically connected to electronic devices in the electrical pathways. These phase shift components are selected so that a vector sum of the reflected signals from the inputs in combining and/or to the outputs in dividing is substantially minimized.

US Patent:

20140368297, Dec 18, 2014

Filed:

Jun 20, 2013

Appl. No.:

13/922980

Inventors:

- Adelphi MD, US
Hingloi Alfred Hung - Bethesda MD, US

International Classification:

H01P 5/12
H03F 3/68

US Classification:

333136, 330295

Abstract:

Power-dividing and/or power-combining circuits have inputs, outputs, at least three electrical pathways, and at least three electronic devices, such as amplifiers, with substantially equal input and output reflection At least one of the electronic devices is in each of the electrical pathways. In one embodiment, multiple phase shift components, such as delay lines, are electrically connected to the electronic devices in each of the electrical pathways. These phase shift components are selected so that a vector sum of the reflected signals from the electronic devices to the inputs and/or the outputs is substantially minimized. In another embodiment, a serial bus extends from the inputs/outputs and at least three pathways in the circuit. The serial bus includes serially-connected impedance-providing components positioned among at least three pathways with the impedance-providing components increasing in impedance from one end to the other end of the serial bus in an amount sufficient to produce a substantially equal amount of power to each of the electronic devices and to substantially minimize input and output reflections.

US Patent:

20140175514, Jun 26, 2014

Filed:

Dec 21, 2012

Appl. No.:

13/724598

Inventors:

Hingloi Alfred Hung - Bethesda MD, US

Assignee:

U.S. ARMY RESEARCH LABORATORY ATTN: RDRL-LOC-I - Adelphi MD

International Classification:

H01L 29/423
H01L 29/40

US Classification:

257194, 257401, 438172

Abstract:

A ring-shaped transistor includes a set of gates. Each gate of the set is disposed between a corresponding source and a corresponding drain. The set of gates are arranged such that all of the set of gates cannot be aligned with fewer than three imaginary straight lines drawn through the gates, with one of the imaginary straight lines passing only once though each of the set of gates.