The present invention is directed to a wide input voltage range surge suppressor. It includes a series circuit for attachment to an upstream AC power input, and to a downstream load. There is a nonlinear low pass L-C filter having an inductor (and in some preferred embodiments, a low Q linear inductor) and a diode bridge, wherein the diode bridge includes at least one large value capacitor. There are two or three electrolytic capacitors of the nonlinear low pass L-C filter diode bridge in preferred embodiments. There is also a two section high pass filter connected to the electrolytic capacitor. This two section high pass filter has at least two diversely rated capacitors and at least three diversely rated resistors. A voltage offset diode is connected to the two section high pass filter and at least one electronic switch is connected to the voltage offset diode, with at least one capacitor connected to the electronic switch. The electronic switch is preferably a silicon controlled rectifier (SCR) switch.
A surge protector for alternating current service includes at least an incoming hot line and a neutral line, but usually includes an incoming hot line, an incoming neutral line and a safety ground line. The surge protector has a series connected transformer with input connection to the incoming hot line, and connected in series to a non-linear surge suppression circuit, and therefore has a gross output connection to the non-linear surge suppression circuit, and a low impedance input to the secondary winding of the series connected transformer from the non-linear surge suppression circuit, and has a surge cancelled hot line output connection. The surge protector is for single or three phase service.
A surge protector for alternating current service includes at least an incoming hot line and a neutral line, but usually includes an incoming hot line, an incoming neutral line and a safety ground line. The surge protector has an input transformer and a series connected transformer with input connection to the input transformer secondary winding, and connected in series to a non-linear surge suppression circuit, and therefore has a gross output connection to the non-linear surge suppression circuit, and a low impedance input to the secondary winding of the series connected transformer from the non-linear surge suppression circuit, and has a surge cancelled hot line output connection.
A gain-controlled amplifier is provided, including first and second common emitter-coupled amplifying transistors for receiving differential input signals. The emitter circuits of the amplifying transistors include first and second controlled resistance devices, having base electrodes coupled to each other and to a source of gain-control potential, collector electrodes coupled to a source of reference potential, and respective emitter electrodes coupled to respective emitter electrodes of the amplifying transistors. Each of the controlled resistance devices includes a region of high resistivity (intrinsic) semiconductor material between the base and emitter electrodes, which gives the base-to-emitter junction of the device a PIN diode-like characteristic. The application of a gain-control potential to the bases of the devices may be used to vary both the small base-to-emitter current and the relatively larger emitter-to-collector current in the devices. Variation of the base-to-emitter current will vary the PIN diode junction resistances and hence the resistances in the emitter circuits of the amplifying transistors, and therefore which control the emitter degeneration of the amplifying transistors.
A surge suppressor for repeatedly protecting a load against surges occurring on A-C power mains from lightning surges or the like comprises a first series circuit having a first inductance and a first alternating voltage limiter, including at least a first capacitance and a bidirectionally conductive rectifier circuit, coupled between first and second input terminals. The first inductance conducts substantially all of the current supplied from the A-C power mains. A second series circuit comprising a second inductance and second alternating voltage limiter, including at least a second capacitance and a second bidirectionally conductive rectifier circuit, is coupled across the first alternating voltage limiter and is coupled to first and second output terminals. The first series circuit is arranged for limiting surge currents and voltage excursions passed to the second series circuit to first levels while the second series circuit is arranged for further limiting surge currents and voltage excursions passed to the output terminals to second levels less than first levels.
A gain controlled amplifier is provided which is capable of handling a wide range of input signal levels without the need for input signal attenuation. A transistor is arranged in a common emitter amplifier configuration and includes a PIN diode as a controllable impedance in the emitter circuit. An input signal and a gain control voltage are applied at the base of the transistor. As the input signal level increases, the gain control voltage is decreased, causing an increase in the substantially resistive impedance of the PIN diode, which bears a constant relationship to the decreasing gain control voltage (i. e. , a linear relationship on a semilog plot). The gain of the transistor amplifier is thereby reduced. At high input signal levels, the impedance of the PIN diode comprises a large resistive component in parallel with a large reactive (i. e. , small capacitive) component at the emitter of the transistor, thereby affording substantial gain reduction.
Television Intermediate Frequency Amplifier With Feedback Stabilization
An I. F. amplifier is provided in which gain control is accomplished by varying the A. C. impedances of variable impedance devices, which devices are coupled as load and emitter degeneration impedances for amplifying transistors. Variable D. C. gain control currents are applied to the variable impedance devices to vary their impedance. Substantially all of the D. C. gain control currents flow through the variable impedance devices in current paths which are separate from the amplifying transistors, thereby avoiding variation of the operating points of the amplifying transistors. The I. F. amplifier includes a D. C. feedback path which does not require the use of feedback amplification, due to the lack of any changes in the operating points of the amplifying stages during gain control. Elimination of the need for feedback amplification also prevents the introduction of noise into the amplified I. F. signals.
A biasing circuit is provided for stabilizing the gain of a transistor amplifier against variations in temperature. The amplifier includes an input terminal and a transistor having a base-to-emitter junction coupled between the input terminal and the second terminal of a two-terminal source of supply potential. The biasing circuit is coupled between the two supply terminals and includes a resistor coupled to the first terminal, a semiconductor rectifying junction coupled between the input terminal of the amplifier and the second supply terminal, and the parallel combination of the collector-to-emitter path of a second transistor and a voltage divider coupled between the resistor and the rectifying junction. The base of the second transistor is coupled to an intermediate tap of the voltage divider. As the temperature of the circuit increases, the g. sub.
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