Jae Eun Choi

US Patent:

20230092986, Mar 23, 2023

Filed:

Feb 2, 2021

Appl. No.:

17/802102

Inventors:

- Cupertino CA, US
Meng-Huan Ho - San Jose CA, US
Abbas Jamshidi Roudbari - Saratoga CA, US
Chih Jen Yang - San Jose CA, US
Chin Wei Hsu - Hsinchu, TW
Jae Won Choi - San Jose CA, US
Jean-Pierre S. Guillou - La Jolla CA, US
Ming Xu - Cupertino CA, US
Rui Liu - San Jose CA, US
Yi Qiao - San Jose CA, US
Yu-Wen Liu - Hsinchu, TW
Yuchi Che - Santa Clara CA, US
Yue Cui - Campbell CA, US

International Classification:

H01L 27/32
H01L 51/52
H01L 51/56

Abstract:

An electronic device may include a display and an optical sensor formed underneath the display. A pixel removal region on the display may at least partially overlap with the sensor. The pixel removal region may include a plurality of non-pixel regions each of which is devoid of thin-film transistors. The plurality of non-pixel regions is configured to increase the transmittance of light through the display to the sensor. In addition to removing thin-film transistors in the pixel removal region, additional layers in the display stack-up may be removed. In particular, a cathode layer, polyimide layer, and/or substrate in the display stack-up may be patterned to have an opening in the pixel removal region. A polarizer may be bleached in the pixel removal region for additional transmittance gains. The cathode layer may be removed using laser ablation with a spot laser or blanket illumination.

US Patent:

20200354826, Nov 12, 2020

Filed:

May 4, 2020

Appl. No.:

15/929467

Inventors:

- Santa Clara CA, US
Kentaro Takano - San Jose CA, US
Jae Ha Choi - Pleasanton CA, US

International Classification:

C23C 14/34
C23C 14/06
C23C 14/58
C23C 14/50

Abstract:

A method for forming a diamond-like carbon (DLC) coating on an article is provided, comprising: alternatingly performing a deposition process and an ashing process on the article a determined number of times, wherein during the deposition process the method proceeds by forming on the article a layer of DLC which includes graphitic spcarbon and tetrahedral spcarbon, and during the ashing process the method proceeds by selectively etching the graphitic spcarbon, wherein the determine number of time is configured to result in a designated overall thickness of the DLC coating.

US Patent:

20200357879, Nov 12, 2020

Filed:

Jul 27, 2020

Appl. No.:

16/939995

Inventors:

- Cupertino CA, US
Yuchi Che - Santa Clara CA, US
Seonpil Jang - Cupertino CA, US
Jae Won Choi - San Jose CA, US
Abbas Jamshidi Roudbari - Saratoga CA, US
Myung-Kwan Ryu - Yongin-Si, KR
Hirokazu Yamagata - Adachi-ku, JP
Keisuke Otsu - Yokohama-shi, JP

International Classification:

H01L 27/32
H01L 51/00
H01L 51/52

Abstract:

An organic light-emitting diode display may have rounded corners. A negative power supply path may be used to distribute a negative voltage to a cathode layer, while a positive power supply path may be used to distribute a positive power supply voltage to each pixel in the display. The positive power supply path may have a cutout that is occupied by the negative power supply path to decrease resistance of the negative power supply path in a rounded corner of the display. To mitigate reflections caused by the positive power supply path being formed over tightly spaced data lines, the positive power supply path may be omitted in a rounded corner of the display, a shielding layer may be formed over the positive power supply path in the rounded corner, or non-linear gate lines may be formed over the positive power supply path.

US Patent:

20200335528, Oct 22, 2020

Filed:

Jun 30, 2020

Appl. No.:

16/917601

Inventors:

- Cupertino CA, US
Jae Won Choi - San Jose CA, US
Shih Chang Chang - San Jose CA, US
Tsung-Ting Tsai - San Jose CA, US
Young Bae Park - Cupertino CA, US

International Classification:

H01L 27/12
G02F 1/1362
G02F 1/1368
H01L 27/32

Abstract:

An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

US Patent:

20200220098, Jul 9, 2020

Filed:

Oct 31, 2019

Appl. No.:

16/670071

Inventors:

- Cupertino CA, US
Abbas Jamshidi Roudbari - San Jose CA, US
Chuan-Sheng Wei - Taoyuan City, TW
HanChi Ting - New Taipei, TW
Jae Won Choi - San Jose CA, US
Jianhong Lin - Taoyuan City, TW
Nai-Chih Kao - Taoyuan City, TW
Shih Chang Chang - Cupertino CA, US
Shin-Hung Yeh - Taipei, TW
Takahide Ishii - Taoyuan City, TW
Ting-Kuo Chang - San Jose CA, US
Yu Hung Chen - Taoyuan City, TW
Yu-Wen Liu - Hsinchu, TW
Yu-Chuan Pai - Zhubei City, TW
Andrew Lin - Milpitas CA, US

International Classification:

H01L 51/52
H01L 51/00
H01L 51/56

Abstract:

A display may have organic light-emitting diode pixels formed from thin-film circuitry. The thin-film circuitry may be formed in thin-film transistor (TFT) layers and the organic light-emitting diodes may include anodes and cathodes and an organic emissive layer formed over the TFT layers between the anodes and cathodes. The organic emissive layer may be formed via chemical evaporation techniques. The display may include moisture blocking structures such as organic emissive layer disconnecting structures that introduce one or more gaps in the organic emissive layer during evaporation so that any potential moisture permeating path from the display panel edge to the active area of the display is completely terminated.

US Patent:

20200075636, Mar 5, 2020

Filed:

Nov 8, 2019

Appl. No.:

16/678599

Inventors:

- Cupertino CA, US
Jae Won Choi - Cupertino CA, US
Shih Chang Chang - Cupertino CA, US
Tsung-Ting Tsai - Cupertino CA, US
Young Bae Park - San Jose CA, US

International Classification:

H01L 27/12
H01L 27/32
G02F 1/1368
G02F 1/1362

Abstract:

An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

US Patent:

20190393295, Dec 26, 2019

Filed:

Apr 4, 2019

Appl. No.:

16/375756

Inventors:

- Cupertino CA, US
Yuchi Che - Cupertino CA, US
Seonpil Jang - Cupertino CA, US
Jae Won Choi - San Jose CA, US
Abbas Jamshidi Roudbari - San Jose CA, US
Myung-Kwan Ryu - Yongin-Si, KR
Hirokazu Yamagata - Adachi-ku, JP
Keisuke Otsu - Yokohama-shi, JP

International Classification:

H01L 27/32
H01L 51/00
H01L 51/52

Abstract:

An organic light-emitting diode display may have rounded corners. A negative power supply path may be used to distribute a negative voltage to a cathode layer, while a positive power supply path may be used to distribute a positive power supply voltage to each pixel in the display. The positive power supply path may have a cutout that is occupied by the negative power supply path to decrease resistance of the negative power supply path in a rounded corner of the display. To mitigate reflections caused by the positive power supply path being formed over tightly spaced data lines, the positive power supply path may be omitted in a rounded corner of the display, a shielding layer may be formed over the positive power supply path in the rounded corner, or non-linear gate lines may be formed over the positive power supply path.

US Patent:

20190043418, Feb 7, 2019

Filed:

May 9, 2018

Appl. No.:

15/975390

Inventors:

- Cupertino CA, US
Shyuan Yang - Burlingame CA, US
Tsung-Ting Tsai - Cupertino CA, US
Cheng-Ho Yu - Milpitas CA, US
Jae Won Choi - San Jose CA, US
Abbas Jamshidi Roudbari - San Jose CA, US
Ting-Kuo Chang - San Jose CA, US

International Classification:

G09G 3/3216
G09G 3/3283
G09G 3/3266
H01L 27/32

Abstract:

A display may have rows and columns of pixels that form an active area for displaying images. A display driver integrated circuit may provide multiplexed data signals to demultiplexer circuitry in the display. The demultiplexer circuitry may demultiplex the data signals and provide the demultiplexed data signals to the pixels on data lines. Gate lines may control the loading of the data signals into the pixels. The display may have a length dimension and a width dimension that is shorter than the length dimension. The data lines may extend parallel to the width dimension and the gate lines may extend parallel to the length dimension such that there are more data lines than gate lines in the display. A notch that is free of pixels may extend into the active area. Data lines extending parallel to the width dimension of the display may be routed around the notch.