James Stephen Crowley

US Patent:

20220404979, Dec 22, 2022

Filed:

Mar 10, 2020

Appl. No.:

16/954156

Inventors:

- Boise ID, US
Jing Sang Liu - Shanghai, CN
Yun Li - Fremont CA, US
James P. Crowley - Longmont CO, US

International Classification:

G06F 3/06

Abstract:

Methods, systems, and devices for managing queues of a memory sub-system are described. A first command can be assigned to a first queue of a memory die of a memory sub-system. The first queue can be is associated with a first priority level and the memory die can include a second queue associated with a second priority level different from the first priority level. The second queue can include a second command, where the first command and the second command are each associated with a respective operation to be performed on the memory sub-system. In some examples, the first command can be issued before the second command based on the first and second priority levels.

US Patent:

20210303340, Sep 30, 2021

Filed:

Mar 24, 2020

Appl. No.:

16/828738

Inventors:

- Boise ID, US
Jiangang Wu - Milpitas CA, US
James P. Crowley - Longmont CO, US

International Classification:

G06F 9/48
G06F 3/06

Abstract:

Methods, systems, and devices for a read counter for quality of service design are described. First commands may be assigned to a first queue of a memory die of a memory sub-system, wherein the first queue is associated with a first priority level. The memory die may include a second queue associated with a second priority level different from the first priority level, the second queue comprising one or more second commands assigned. Based at least in part on a counter associated with the first queue and the first and second priority levels, it may be determined that a threshold number of the first commands of the first queue have issued without a command from the one or more second commands having issued. A command from the second commands may issue before issuing a next command of the first commands based at least in part on the counter.

US Patent:

20140281780, Sep 18, 2014

Filed:

Mar 14, 2014

Appl. No.:

14/211043

Inventors:

- Dayton OH, US
Liuxi Yang - Sunnyvale CA, US
James Patrick Crowley - Santa Cruz CA, US

Assignee:

Teradata Corporation - Dayton OH

International Classification:

G06F 11/10
H04L 1/08

US Classification:

714748, 714807

Abstract:

Errors that can be detected as a result of the mapping of transmission data from its physical form back to its logical form can be considered in addition to the errors detected by using an error detection technique (e.g., a conventional CRC technique), thereby allowing fewer error detection/recovery bits (error recovery data or bits) to be used as would be possible by using the error detection technique alone. In other words, less error recovery data would be needed to achieve a given level accuracy using conventional techniques. As a result, overhead associated with adding error detection/recovery bits can be reduced.