Apparatus stores a composite video frame including synchronization signals, color burst signals, and analog signals. The synchronization signals, color burst signals and analog signals of a video frame are sampled and digitized by circuitry: Two addressable memories are provided. An input register coupled to first and second memories buffers a plurality of digitized samples. An output register coupled to said first and second memories buffers the outputs of the memories. Address circuits provide sequential addressed to the memories for each cycle. During a write cycle, control means provide control signals for enabling the input register to buffer the samples and alternately write enabling the memories to store said samples. During a read cycle, control signals are provided for alternately read enabling the second memories to output the samples and to enable the output register to buffer the output. A circuit converts the output into analog.
System For Synchronizing Digital Bit Stream For Telecommunication System
Mehmet Mustafa - Waltham MA Ernest P. Tweedy - Lexington MA James C. Stoddard - Wayland MA Walter J. Beriont - Natick MA
Assignee:
GTE Government Systems Corporation - Waltham MA
International Classification:
H04N 704
US Classification:
358147
Abstract:
A telecommunication system for synchronizing a digital bit stream sent from a central facility to a terminal on lines of television frames. Each active line starts with a horizontal sync pulse and a color burst. A first data clock at the central facility provides first data clock pulses synchronized with said color burst. A circuit at the central facility provides a flag bit one clock pulse wide delayed by a first constant number of clock pulses from the start of the line's horizontal sync pulse. A second data clock at the terminal provides second data clock pulses synchronized with said color burst. A circuit at said terminal provides a time window delayed by a second constant number of clock pulses from the start of the line's horizontal sync pulse so as to bracket said flag bit. A plurality of second data clock pulses occur during said time window. Circuits at the terminal determine which of said plurality of second data clock pulses coincide in time with said flag bit, thereby synchronizing said data stream with said second data clock.
Methods Of And Apparatus For The Generation Of Split-Screen Video Displays
James C. Stoddard - Wayland MA Ernest P. Tweedy - Lexington MA
Assignee:
GTE Laboratories Incorporated - Waltham MA
International Classification:
H04N 5262
US Classification:
358183
Abstract:
Split-screen video displays are presented at a plurality of different sites for a video teleconference. Video cameras are focused respectively upon the conferees directly, and centrally. The displays at each site show the conferees at remote sites. The positioning of the conferees at different sites on a display is achieved electronically, as by delays of a half a line and/or delays of half a field, rather than by panning or tilting of a camera.
A TV channel selector assembly includes a keyboard having ten keys corresponding to the decimal numbers zero through nine, inclusive. The desired channel may be selected merely by activating the appropriately numbered keys, there being no other keys required to be activated to effect a channel change. After activation of the first key, which may be either a units digit channel or the tens digit of a two digit channel, a delay circuit defines a timed interval of about two seconds. Each keyboard output is encoded into a four digital word. A control device transfers the first digital word to a units channel input if a second key is not activated during the timed interval. If a second key is activated during the timed interval, the first digital word is transferred to a tens channel output, and the second digital word is transferred to the units channel output.
Lead Operator/Firefighter/HazMat Tech at Momentive
Location:
Cohoes, New York
Industry:
Chemicals
Work:
Momentive - Waterford, NY since Nov 2009
Lead Operator/Firefighter/HazMat Tech
Imperial Pools Inc - Latham, NY Dec 2005 - Nov 2009
Yard Leader
TerLis Inc - Troy, NY Aug 2001 - Dec 2005
Site Supervisor
Degussa - Waterford, NY Feb 2000 - Aug 2001
Machine Operator
Seal King - Troy, NY Jun 1996 - Feb 2000
Driveway Mechanic/Driver
Education:
Hudson Valley Community College (School of Liberal Arts) 2004 - 2006
Associates, Applied Science
Cohoes Board of Education 1996 - 1996
High School Equivalency Diploma, General Studies
Albany High School 1993 - 1996
Skills:
Fire Safety Hazmat Response Spill Management Inventory Management Emergency Management Microsoft Office Manufacturing Fire Management Safety Management Systems Firefighting Continuous Improvement Process Improvement Quality Control Hazardous Materials Fire Protection Forklift Operator Logistics Process Engineering HAZOP Process Safety HAZWOPER
Honor & Awards:
HVCC President's List
National Dean's List
McKinley Scholarship
Master Production Scheduler At Catalent Pharma Solutions
Master Production Scheduler at Catalent Pharma Solutions
Location:
Kenosha, Wisconsin
Industry:
Food Production
Work:
Catalent Pharma Solutions since Sep 2012
Master Production Scheduler
Little Lady Foods Jan 2011 - Feb 2012
material manager
Little Lady Foods Mar 2007 - Jan 2011
master prodcution scheduler
Paris Presents 2004 - 2007
Buyer
Hu-Friedy Mfg. Co., LLC 1999 - 2003
buyer
Education:
Northeastern Illinois University 1990 - 1996
economics, economics