James F Tuttle

US Patent:

7120721, Oct 10, 2006

Filed:

Aug 27, 2002

Appl. No.:

10/228513

Inventors:

James M. Tuttle - Lunenburg MA, US
Douglas E. Peeke - Shrewsbury MA, US

Assignee:

EMC Corporation - Hopkinton MA

International Classification:

G06F 9/00
G06F 13/38
G02B 6/36

US Classification:

710305, 710 72, 385 55, 370464

Abstract:

First and second inputs are associated with a port. Logic produces indications to software to cause the first input and second input to appear as a single input to the software. The logic produces an indication that no signal is present on either the first input or the second input. When a port bypass controller is coupled to the port, the logic produces an indication that both the first and second inputs are bypassed. When the port bypass controller is coupled to a Fibre Channel arbitrated loop, the logic produces a first signal to control whether the first input is included on the Fibre Channel arbitrated loop or bypassed, and a second signal to control whether the second input is included in the Fibre Channel arbitrated loop or bypassed.

US Patent:

7194673, Mar 20, 2007

Filed:

Dec 20, 2002

Appl. No.:

10/327338

Inventors:

James M. Tuttle - Lunenburg MA, US
Douglas E. Peeke - Shrewsbury MA, US
Geoffrey Reid - Waltham MA, US

Assignee:

EMC Corporation - Hopkinton MA

International Classification:

H03M 13/33
H03M 13/01

US Classification:

714775, 714700

Abstract:

Described are a storage system and method for detecting an intermittent loss of synchronization in communication signals received by an enclosure connected to a Fibre Channel loop. A control board produces a first signal representing a status of communication signals received by the control board. The first signal is in one of a plurality of logical states. A first logical state indicates that the status of the communication signals is invalid and a second logical state indicates that the status of the communication signals is valid. The control board includes a glitch-detection circuit that places a second signal in an asserted logical state when the first signal is in the first logical state during a time interval and holds the second signal at the asserted logical state when the first signal transitions from being in the first logical state to being in the second logical state during the time interval.

US Patent:

42126851, Jul 15, 1980

Filed:

Dec 11, 1978

Appl. No.:

5/968104

Inventors:

James N. Tuttle - Bedford MA

Assignee:

Lea Manufacturing Company - Waterbury CT

International Classification:

C23B 902
C23F 714

US Classification:

148 61

Abstract:

The invention is for a process for providing a protective, color receptive coating over aluminum using chemical means without a requirement for the use of an electric current as in electrical anodizing. Absent conventional steps such as water rinses, the process comprises cleaning, including desmutting of the surface of an aluminum part as necessary, and treatment with an aqueous alkaline solution of ferric citrate for a time sufficient to provide the coating over the part. The treated aluminum part has enhanced corrosion resistance and the coating over the part acts as a base for other coatings such as paint, and is readily dyed.