Janet Nelson Rice

US Patent:

6624003, Sep 23, 2003

Filed:

Feb 6, 2002

Appl. No.:

10/068259

Inventors:

Janet L. Rice - Round Rock TX

Assignee:

Teravicta Technologies, Inc. - Austin TX

International Classification:

H01L 2144

US Classification:

438106, 438126, 438127, 438115

Abstract:

A microelectromechanical circuit includes a packaging substrate having conductive features on its lower surface. The circuit may further include a microelectromechanical device formed upon the upper surface of the substrate, wherein an underside of at least one element of the device is in contact with the upper surface of the substrate. In some embodiments, the circuit may include one or more covers spaced above the substrate and the device. The circuit may further include a sealing structure laterally surrounding the device and interposed between the substrate and the covers. An array of microelectromechanical circuits may include a packaging substrate with first and second microelectromechanical devices laterally spaced upon its upper surface, first and second covers above the substrate and the first and second devices, and a sealing structure between the substrate and the first and second covers. A method for forming a microelectromechanical device may include forming the device upon a packaging substrate having one or more conductive features upon its lower surface.

US Patent:

6809412, Oct 26, 2004

Filed:

Jul 3, 2002

Appl. No.:

10/188899

Inventors:

Cory G. Tourino - Georgetown TX
Janet L. Rice - Austin TX
Gregory Flynn - Austin TX

Assignee:

Teravictu Technologies - Austin TX

International Classification:

H01L 2302

US Classification:

257678, 257777

Abstract:

A microelectromechanical circuit includes a cover attached to a package substrate by a thermoplastic. A MEMS device is disposed between the cover and the packaging substrate. The thermoplastic is substantially free of solvents. In addition, surfaces of the device are substantially free of solvents. The cover, the packaging substrate, and the thermoplastic form a protective enclosure around the device. The MEMS device may be formed on a substrate. The substrate may be attached to the packaging substrate by a thermoplastic. The thermoplastic may also be substantially solvent-free. A method for forming the circuit includes heating a thermoplastic to a temperature sufficient to remove all solvent from the thermoplastic. The temperature may be above a boiling point of the solvent. The method also includes arranging the thermoplastic between the cover and the packaging substrate and applying pressure and heat to the thermoplastic to form a protective enclosure around the device.

US Patent:

60982829, Aug 8, 2000

Filed:

Mar 3, 1998

Appl. No.:

9/034072

Inventors:

Jerome Albert Frankeny - Taylor TX
Richard Francis Frankeny - Austin TX
Terry Frederick Hayden - Round Rock TX
Ronald Lann Imken - Round Rock TX
Janet Louise Rice - Round Rock TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H05K 342

US Classification:

29852

Abstract:

Method and apparatus for fabricating fine pitch pattern multilayer printed circuit boards involving laminar stackable board layers providing power distribution, signal distribution and capacitive decoupling. In one respect, the invention relates to the fabrication of board layers by beginning with a metallic core, patterning the core, selectively enclosing the core in a dielectric, selectively depositing metal to form vias, plugs and signal lines, and forming dendrites with joining metallurgy on the vias and plugs to provide stackable connection from above or below the plane of the board layer. In another aspect, the invention is directed to the use of a sol-gel process to form a thin high dielectric constant crystalline film onto a metallic sheet followed with a deposition of a metallic layer onto the high dielectric constant film. The film serves as the dielectric of a capacitor layer which is thereafter in succession patterned, covered by a dielectric, and has selectively deposited a metallic layer for interconnecting the capacitor and forming vias. The ends of the vias are thereafter subject to dendritic growth and joining metallurgy to provide stackable interconnection capability.

US Patent:

57453330, Apr 28, 1998

Filed:

Nov 21, 1994

Appl. No.:

8/342507

Inventors:

Jerome Albert Frankeny - Taylor TX
Richard Francis Frankeny - Austin TX
Terry Frederick Hayden - Round Rock TX
Ronald Lann Imken - Round Rock TX
Janet Louise Rice - Round Rock TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01G 406

US Classification:

361313

Abstract:

Method and apparatus for fabricating fine pitch pattern multilayer printed circuit boards involving laminar stackable board layers providing power distribution, signal distribution and capacitive decoupling. In one respect, the invention relates to the fabrication of board layers by beginning with a metallic core, patterning the core, selectively enclosing the core in a dielectric, selectively depositing metal to form vias, plugs and signal lines, and forming dendrites with joining metallurgy on the vias and plugs to provide stackable connection from above or below the plane of the board layer. In another aspect, the invention is directed to the use of a sol-gel process to form a thin high dielectric constant crystalline film onto a metallic sheet followed with a deposition of a metallic layer onto the high dielectric constant film. The film serves as the dielectric of a capacitor layer which is thereafter in succession patterned, covered by a dielectric, and has selectively deposited a metallic layer for interconnecting the capacitor and forming vias. The ends of the vias are thereafter subject to dendritic growth and joining metallurgy to provide stackable interconnection capability.