Jason B Goldstein

US Patent:

20040098517, May 20, 2004

Filed:

Jul 2, 2003

Appl. No.:

10/612863

Inventors:

Jason Goldstein - Brookline MA, US

International Classification:

G06F003/00

US Classification:

710/001000

Abstract:

A serial-to-parallel/parallel-to-serial conversion engine provides a bi-directional interface between a serial TDM highway and a parallel TDM highway. The conversion engine includes a serial-to-parallel data conversion device receives a serially received data word and provides a parallel output data word. The conversion engine includes a serial data input interface that receives the serially received data word and provides a received data word. A serial-to-parallel mapping circuit receives the received data word and generates memory write control and write address signals. A memory device includes a first port responsive to the memory write control signals and write address signals for writing the received data word into the memory device, and a second port responsive to memory read control and read address signals for reading data from the memory device. Output interface circuitry generates the memory read control and read address signals, and receives output data from the memory device and reorders the bits of the parallel output data to provide the parallel data word. The conversion engine also includes a parallel-to-serial conversion device that receives a parallel received data word and provides a serial data word. The parallel-to-serial conversion device includes a memory device having a first port responsive to memory write control and write address signals, and a second port responsive to memory read control and read address signals. A parallel-to-serial mapping circuit receives the parallel received data word and generates the memory write control and write address signals to write a bit shuffled version of the parallel received data word into the memory device. A data output interface generates the memory read control and read address signals to perform reads from the memory device and receives output data from the memory device to provide the serial data word.

US Patent:

20060001683, Jan 5, 2006

Filed:

Mar 23, 2005

Appl. No.:

11/087423

Inventors:

Alexander May - Stoneham MA, US
Jason Goldstein - Redmond WA, US

International Classification:

G09G 5/00

US Classification:

345661000

Abstract:

Methods and apparatus, including computer program products, for structure image generation. A network includes a corporate server linked to a building server, devices linked to the building server, a first set of the devices selectively controlling room light emanating to an exterior of a structure from a plurality of rooms within the structure, and a second set of devices selectively controlling lighting fixtures within the plurality of rooms, the first set of devices integrated with the second set of devices.

US Patent:

6684275, Jan 27, 2004

Filed:

Oct 23, 1999

Appl. No.:

09/427669

Inventors:

Jason A. Goldstein - Brookline MA

Assignee:

Octave Communications, Inc. - Salem NH

International Classification:

G06F 1312

US Classification:

710 71, 710 2, 341100

Abstract:

A serial-to-parallel/parallel-to-serial conversion engine provides a bi-directional interface between a serial TDM highway and a parallel TDM highway. The conversion engine includes a serial-to-parallel data conversion device receives a serially received data word and provides a parallel output data word. The conversion engine includes a serial data input interface that receives the serially received data word and provides a received data word. A serial-to-parallel mapping circuit receives the received data word and generates memory write control and write address signals. A memory device includes a first port responsive to the memory write control signals and write address signals for writing the received data word into the memory device, and a second port responsive to memory read control and read address signals for reading data from the memory device. Output interface circuitry generates the memory read control and read address signals, and receives output data from the memory device and reorders the bits of the parallel output data to provide the parallel data word. The conversion engine also includes a parallel-to-serial conversion device that receives a parallel received data word and provides a serial data word.