Jay T Yoder from 174 Main St, Allensville, PA 17002, age 76, Phone: (717)4836639

Semiconductor Device And Laminated Leadframe Package
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US Patent:

6768186, Jul 27, 2004
Filed:

Oct 15, 2002
Appl. No.:

10/270401
Inventors:

Joseph K. Fauty - Mesa AZ
Jay Allen Yoder - Glendale AZ
Assignee:

Semiconductor Components Industries, L.L.C. - Phoenix AZ
International Classification:

H01L 23495
US Classification:

257666, 257783, 257775, 257787, 257781, 257784
Abstract:

An semiconductor device ( ) comprising a first semiconductor die ( ) and a leadframe ( ). The leadframe includes a first laminate ( ) having a bottom surface formed with a lead ( ) of the semiconductor device, a second laminate ( ) overlying the first laminate for mounting the semiconductor die, and an adhesive tape ( ) for attaching the first and second laminates.

Multi-Chip Semiconductor Connector Assembly Method
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US Patent:

7202105, Apr 10, 2007
Filed:

Jun 28, 2004
Appl. No.:

10/877165
Inventors:

Francis J. Carney - Gilbert AZ, US
Phillip Celaya - Gilbert AZ, US
Joseph K. Fauty - Mesa AZ, US
James P. Letterman - Mesa AZ, US
Stephen St. Germain - Scottsdale AZ, US
Jay A. Yoder - Phoenix AZ, US
Assignee:

Semiconductor Components Industries, L.L.C. - Phoenix AZ
International Classification:

H01L 23/495
US Classification:

438107, 257E23042
Abstract:

In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is attached to a first semiconductor die and a second conductive strip that is attached to a second semiconductor die.

Multi-Chip Semiconductor Connector And Method
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US Patent:

7202106, Apr 10, 2007
Filed:

Jun 28, 2004
Appl. No.:

10/877327
Inventors:

Francis J. Carney - Gilbert AZ, US
Phillip Celaya - Gilbert AZ, US
Joseph K. Fauty - Mesa AZ, US
James P. Letterman - Mesa AZ, US
Stephen St. Germain - Scottsdale AZ, US
Jay A. Yoder - Phoenix AZ, US
Assignee:

Semiconductor Components Industries, L.L.C. - Phoenix AZ
International Classification:

H01L 21/44
H01L 21/50
US Classification:

438107, 438121, 257E21499
Abstract:

In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is suitable for attaching to a first semiconductor die and a second conductive strip that is attached suitable for attaching to a second semiconductor die.

Multi-Chip Semiconductor Connector Assemblies
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US Patent:

7298034, Nov 20, 2007
Filed:

Jun 28, 2004
Appl. No.:

10/877325
Inventors:

Francis J. Carney - Gilbert AZ, US
Phillip Celaya - Gilbert AZ, US
Joseph K. Fauty - Mesa AZ, US
James P. Letterman - Mesa AZ, US
Stephen St. Germain - Scottsdale AZ, US
Jay A. Yoder - Phoenix AZ, US
Assignee:

Semiconductor Components Industries, L.L.C. - Phoenix AZ
International Classification:

H01L 23/02
US Classification:

257686, 257E25018, 257676, 257685, 257777, 438108, 438109, 361760
Abstract:

In one exemplary embodiment, a multi-chip semiconductor connector is utilized for forming a semiconductor package having a plurality of semiconductor die. The multi-chip semiconductor connector is utilized to mechanically attach the plurality of semiconductor die together and to provide electrical connection to the plurality of semiconductor die.

Multi-Chip Semiconductor Connector Assembly Method
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US Patent:

7498195, Mar 3, 2009
Filed:

Feb 12, 2007
Appl. No.:

11/673942
Inventors:

Francis J. Carney - Gilbert AZ, US
Phillip Celaya - Gilbert AZ, US
Joseph K. Fauty - Mesa AZ, US
James P. Letterman - Mesa AZ, US
Stephen St. Germain - Scottsdale AZ, US
Jay A. Yoder - Phoenix AZ, US
Assignee:

Semiconductor Components Industries, L.L.C. - Phoenix AZ
International Classification:

H01L 21/00
US Classification:

438107, 438111, 257E21615
Abstract:

In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is attached to a first semiconductor die and a second conductive strip that is attached to a second semiconductor die.

Multi-Chip Semiconductor Connector Assemblies
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US Patent:

7508060, Mar 24, 2009
Filed:

Sep 24, 2007
Appl. No.:

11/860379
Inventors:

Francis J. Carney - Gilbert AZ, US
Phillip Celaya - Gilbert AZ, US
Joseph K. Fauty - Mesa AZ, US
James P. Letterman - Mesa AZ, US
Stephen St. Germain - Scottsdale AZ, US
Jay A. Yoder - Phoenix AZ, US
Assignee:

Semiconductor Components Industries, L.L.C. - Phoenix AZ
International Classification:

H01L 23/52
US Classification:

257686
Abstract:

In one exemplary embodiment, a multi-chip semiconductor connector is utilized for forming a semiconductor package having a plurality of semiconductor die. The multi-chip semiconductor connector is utilized to mechanically attach the plurality of semiconductor die together and to provide electrical connection to the plurality of semiconductor die.

Method Of Forming A Leaded Molded Array Package
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US Patent:

7588999, Sep 15, 2009
Filed:

Oct 28, 2005
Appl. No.:

11/259981
Inventors:

William F. Burghout - Mesa AZ, US
Francis J. Carney - Queen Creek AZ, US
Joseph K. Fauty - Mesa AZ, US
James P. Letterman - Mesa AZ, US
Jay A. Yoder - Phoenix AZ, US
Assignee:

Semiconductor Components Industries, LLC - Phoenix AZ
International Classification:

H01L 21/301
H01L 23/495
US Classification:

438461, 257676
Abstract:

In one embodiment, a method for forming a leaded molded array package includes placing a lead frame assembly into a molding apparatus having lead cavities. The method further includes forming seals between conductive leads within the lead frame assembly and the lead cavities, and encapsulating the lead frame assembly to form a molded array assembly. The molded array assembly is then separated into individual leaded molded packages.

Semiconductor Component And Method Of Manufacture
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US Patent:

7598123, Oct 6, 2009
Filed:

Mar 2, 2007
Appl. No.:

11/681500
Inventors:

Jay A. Yoder - Phoenix AZ, US
Joseph K. Fauty - Mesa AZ, US
James P. Letterman - Mesa AZ, US
Assignee:

Semiconductor Components Industries, L.L.C. - Phoenix AZ
International Classification:

H01L 21/00
US Classification:

438112, 438108, 438109, 257686, 257723, 257777, 257796, 257E21506, 257E23034, 257E23066, 257E23116
Abstract:

A semiconductor component comprising two stacked semiconductor dice and a method of manufacture. A leadframe having an active area that includes leadframe leads and a cavity is mounted to a support material such as an adhesive tape. A packaged semiconductor die that includes a first semiconductor die mounted to a support structure and encapsulated within a mold compound is mounted on the adhesive tape. A second semiconductor die is mounted to the packaged semiconductor die. Bond pads on the second semiconductor die are electrically connected to the leadframe, the support structure on which the first semiconductor die is mounted, or both. A mold compound is formed around the second semiconductor die, portions of the leadframe, and the packaged semiconductor die. The adhesive tape is removed and the leadframe is singulated to form multi-chip packages.