Jeffery K Marshall

US Patent:

60345462, Mar 7, 2000

Filed:

Jun 9, 1998

Appl. No.:

9/093651

Inventors:

Christopher W. Jones - Pleasanton CA
Jeffery Mark Marshall - Austin TX

Assignee:

Cypress Semicondutor Corp. - San Jose CA

International Classification:

H03K 19177

US Classification:

326 39

Abstract:

A macrocell for a programmable logic device includes a carry generator for generating a carry input to the macrocell, the carry generator having an inverting input and at least one non-inverting input. A carry decoupler controls the carry generator and allows any macrocell to be decoupled from a next adjacent macrocell. An XOR gate having a first input is coupled to the output of the carry generator and a second input thereof is connected to a logic input to the macrocell. A register is coupled to the output of the XOR gate. A macrocell output selector includes a first input coupled to an output of the register and a second input coupled to the output of the XOR gate. A method for implementing a carry chain for macrocells within a product term based programmable logic device according to the present invention includes the steps of logically ANDing a carry input with a user-configurable input to produce an intermediate result; selecting one of two carry input product terms from a product term array based upon the intermediate result, the selected carry product term being a carry input to a current macrocell; propagating the carry input of the current macrocell to a next macrocell; and repeating the ANDing, selecting and propagating steps until a last macrocell of the chain is reached.

US Patent:

62014099, Mar 13, 2001

Filed:

Feb 8, 2000

Appl. No.:

9/499816

Inventors:

Christopher W. Jones - Pleasanton CA
Jeffery Mark Marshall - Austin TX

Assignee:

Cypress Semiconductor Corp. - San Jose CA

International Classification:

H03K 19177

US Classification:

326 39

Abstract:

A macrocell for a programmable logic device includes a carry generator for generating a carry input to the macrocell, the carry generator having an inverting input and at least one non-inverting input. A carry decoupler controls the carry generator and allows any macrocell to be decoupled from a next adjacent macrocell. An XOR gate having a first input is coupled to the output of the carry generator and a second input thereof is connected to a logic input to the macrocell. A register is coupled to the output of the XOR gate. A macrocell output selector includes a first input coupled to an output of the register and a second input coupled to the output of the XOR gate. A method for implementing a carry chain for macrocells within a product term based programmable logic device according to the present invention includes the steps of logically ANDing a carry input with a user-configurable input to produce an intermediate result; selecting one of two carry input product terms from a product term array based upon the intermediate result, the selected carry product term being a carry input to a current macrocell; propagating the carry input of the current macrocell to a next macrocell; and repeating the ANDing, selecting and propagating steps until a last macrocell of the chain is reached.

US Patent:

62014072, Mar 13, 2001

Filed:

Oct 7, 1997

Appl. No.:

8/946030

Inventors:

Richard L. Kapusta - San Jose CA
Jeffery Mark Marshall - Austin TX
Haneef D. Mohammed - Beaverton OR

Assignee:

Cypress Semiconductor Corp - San Jose CA

International Classification:

G06F 738
H03K 19177

US Classification:

326 39

Abstract:

A circular product term allocator configured to provide connections for product term signals to macrocells of a programmable logic device is provided. The circular product term allocator may provide such connections through a logic OR function. Alternatively, a homogeneous product term allocator may be configured to provide connections for product term signals to macrocells of a programmable logic device. The homogeneous product term allocator may be configured to provide each of the product term signals to an equal number of macrocells. In yet another embodiment, a programmable logic device includes a plurality of macrocells and a product term allocator configured to provide an equal number of product term signals to each of the macrocells. In yet a further embodiment, a method of distributing product terms in a programmable logic device is accomplished by configuring a product term allocator to provide an equal number of product terms, but fewer than all of the product terms, to each of the macrocells.