Jeffrey B Berger

US Patent:

6449697, Sep 10, 2002

Filed:

Apr 23, 1999

Appl. No.:

09/298119

Inventors:

Brent Cameron Beardsley - Tucson AZ
Jeffrey Allen Berger - San Jose CA

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1208

US Classification:

711137, 711113, 711170, 710 36

Abstract:

Disclosed is a method, system, and program for prestaging data into cache from a storage system in preparation for data transfer operations. A first processing unit communicates data transfer operations to a second processing unit that controls access to the storage system. The first processing unit determines addressable locations in the storage system of data to prestage into cache and generates a data structure capable of indicating contiguous and non-contiguous addressable locations addressable locations in the storage system including the data to prestage into the cache. The first processing unit transmits a prestage command to the second processing unit. The prestage command causes the second processing unit to prestage into cache the data at the addressable locations indicated in the data structure. The first processing unit then requests data at the addressable locations indicated in the data structure. In response, the second processing unit returns the requested data from the cache.

US Patent:

6718445, Apr 6, 2004

Filed:

Mar 26, 1999

Appl. No.:

09/280796

Inventors:

Cecilia Carranza Lewis - San Jose CA
Jeffrey Allen Berger - San Jose CA
David Levish - San Jose CA
W. James Kincaid - Pebble Beach CA

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1200

US Classification:

711159, 711170, 710 56

Abstract:

The present invention provides a system and method for dynamic management of buffers by the buffer manager for a hierarchical file system. A system according to the present invention includes a buffer pool which is comprised of both fixed and virtual storage. The buffer pool is logically partitioned into three states, fixed, pageable and released, wherein each of the plurality of buffers in the buffer pool exists in one of these states. The system further comprises the buffer manager, which dynamically manages the buffers in the system by moving them between these three states in a non-disruptive manner based on a comparison between the actual usage of fixed and virtual storage compared with target usage values for the fixed and virtual storage.

US Patent:

6993629, Jan 31, 2006

Filed:

Jul 12, 2002

Appl. No.:

10/194204

Inventors:

Brent Cameron Beardsley - Tucson AZ, US
Jeffrey Allen Berger - San Jose CA, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 12/06

US Classification:

711137, 711170, 711113, 710 36

Abstract:

Disclosed is a method, system, and program for prestaging data into cache from a storage system in preparation for data transfer operations. A first processing unit communicates data transfer operations to a second processing unit that controls access to the storage system. The first processing unit determines addressable locations in the storage system of data to prestage into cache and generates a data structure capable of indicating contiguous and non-contiguous addressable locations addressable locations in the storage system including the data to prestage into the cache. The first processing unit transmits a prestage command to the second processing unit. The prestage command causes the second processing unit to prestage into cache the data at the addressable locations indicated in the data structure. The first processing unit then requests data at the addressable locations indicated in the data structure. In response, the second processing unit returns the requested data from the cache.

US Patent:

7840774, Nov 23, 2010

Filed:

Sep 9, 2005

Appl. No.:

11/233956

Inventors:

Jeffrey Allen Berger - San Jose CA, US
Sauraj Goswami - Palo Alto CA, US
Balakrishna Raghavendra Iyer - San Jose CA, US
Michael R. Shadduck - Los Altos CA, US
James Zu-Chia Teng - San Jose CA, US
Stephen Walter Turnbaugh - Hollister CA, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 12/00
G06F 13/00
G06F 13/28
G06F 13/12
G06F 13/38

US Classification:

711171, 711159, 711E12054, 710 68

Abstract:

Various embodiments of a computer-implemented method, system and computer program product maintain a logical page having a predetermined size. Data is added to an uncompressed area of the logical page. The uncompressed area of the logical page is associated with an uncompressed area of a physical page. The logical page also has a compressed area associated with a compressed area of a physical page. In response to exhausting the uncompressed area, data in the uncompressed area is included in the compressed area. The uncompressed area is adjusted.

US Patent:

8185701, May 22, 2012

Filed:

Feb 5, 2008

Appl. No.:

12/025801

Inventors:

Jeffrey A. Berger - San Jose CA, US
Yue Huang - San Jose CA, US
Hong Min - Poughkeepsie NY, US
Terence P. Purcell - Springfield IL, US
Kou-Horng A. Yang - Saratoga CA, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 13/00
G06F 13/28

US Classification:

711147, 710 36, 707705

Abstract:

A method, system, and computer program product are provided for retrieving records into a main memory. A first number of gaps and a first total gap size are received for a list of records from a database subsystem. A determination is made of a first average gap size using the first number of gaps and the first total gap size. A determination is made as to whether the first average gap size is greater than a prestaging threshold value. Responsive to the first average gap size being equal to or less than the prestaging threshold value, a prestaging flag is set for the list of records. Then, the list of records is retrieved into the main memory using prestaging.

US Patent:

8380680, Feb 19, 2013

Filed:

Jun 23, 2010

Appl. No.:

12/821801

Inventors:

Jeffrey Berger - San Jose CA, US
Terence P. Purcell - Springfield IL, US
James Z. Teng - San Jose CA, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 7/00
G06F 17/00
G06F 12/00
G06F 17/30
G06F 13/00
G06F 13/28

US Classification:

707692, 707687, 707690, 707813, 707820, 711133, 711137

Abstract:

Prefetching data using a piecemeal list prefetching method. This is achieved by various means, including building a plurality of data pages, sorting the plurality of data pages into sequential data pages and a list of non-sequential pages, prefetching the sequential data pages using a first prefetching technique, and prefetching the non-sequential list of data pages using a second prefetching technique.

US Patent:

54993547, Mar 12, 1996

Filed:

May 19, 1993

Appl. No.:

8/064295

Inventors:

John G. Aschoff - Watsonville CA
Jeffrey A. Berger - San Jose CA
David A. Burton - Tucson AZ
Bruce McNutt - Gilroy CA
Stanley C. Kurtz - Watsonville CA

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1202

US Classification:

395456

Abstract:

Dynamic allocation of read cache space is allocated among bands of DASD cylinders rather than to data sets or processes as a function of a weighted average hit ratio to the counterpart cache space. Upon the hit ratio falling below a predetermined threshold, the bands are disabled for a defined interval as measured by cache accesses and then rebound to cache space again.

US Patent:

56088906, Mar 4, 1997

Filed:

Apr 6, 1995

Appl. No.:

8/417631

Inventors:

Jeffrey A. Berger - San Jose CA
Stanley C. Kurtz - Watsonville CA

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1208
G06F 1200

US Classification:

395440

Abstract:

A method and means for dynamically managing access by data sets to an LRU disciplined DASD cache staging data sets. A threshold utilizes the inverse of slowly varying global hit ratios (ST) taken over a large number of data sets to control the access by individual data sets in cache as measured by their local hit ratios (DSHR). After an initial trial period, a data set is allowed access to the cache only where DSHR>ST. The method and means are self adjusting in that as I/O demand changes, ST also changes in phase such that an increase in aggregate demand for cache results in elimination of data sets whose DSHRs were marginally equal to the old ST and now less than the new ST. Utilization of a DASD Fast Write and non-volatile store (NVS) can be managed similarly if coordinated with the cache and maintenance of both a global WRITE threshold (WR), local data set write hit ratio (DSHRW), and invocation of Fast Write only where DSHRW>WT (write threshold).