Jeffrey M Speiser

US Patent:

40608506, Nov 29, 1977

Filed:

Apr 25, 1977

Appl. No.:

5/791132

Inventors:

Jeffrey M. Speiser - San Diego CA

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

G06G 719
G06F 1534

US Classification:

364819

Abstract:

A beam former, to be used with a circular array of N receiving elements, toreq. 3, comprising a set of N discrete Fourier transform (DFT) devices, each one connected to one of the receiving elements, for taking a temporal discrete Fourier transform of the signals at each of the N receiving elements. Means are connected to the array of DFT devices, for connecting sequentially to each of the N devices. A reference function generator generates the sequence of terms ##EQU1## where the argument x is equal to the number of wavelengths in the circumference of the circular array at the frequency being processed, and M is several times greater than x. A means connected to the connecting means and to the reference function generator circularly convolves the signals, for example, acoustic signals, received from the connecting means and the function generator. The beam former may further comprise means connected to the convolving means for displaying the inverse discrete Fourier transform, and therefore the beam pattern.

US Patent:

39521869, Apr 20, 1976

Filed:

Feb 10, 1975

Appl. No.:

5/548300

Inventors:

Jeffrey M. Speiser - San Diego CA
Harper John Whitehouse - San Diego CA

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

G06F 1534

US Classification:

235156

Abstract:

An apparatus for the generation of a two-dimensional discrete Fourier transform of an input signal developed from data within a data block, or field, having a size of N. sub. 1 by N. sub. 2 data points, N. sub. 1 and N. sub. 2 being relatively prime with respect to each other, the transforms being in a form suitable for subsequent electronic processing. The apparatus comprises an input scan apparatus connectable to the N. sub. 1 by N. sub. 2 two-dimensional data field comprising the input signal, such as a television viewing field. The apparatus receives and scans in proper order, or sequence, the N. sub. 1 by N. sub. 2 input data so that the subsequently generated one-dimensional Fourier transform of the length N. sub. 1 N. sub. 2 serial data string is identical to an N. sub. 1 by N. sub. 2 two-dimensional discrete Fourier transform of the N. sub. 1 by N. sub.

US Patent:

47927879, Dec 20, 1988

Filed:

Feb 4, 1987

Appl. No.:

7/010675

Inventors:

Jeffrey M. Speiser - San Diego CA
Harper J. Whitehouse - San Diego CA
William H. McKnight - San Diego CA

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

H03M 304

US Classification:

341156

Abstract:

Improved dynamic range resolution or accuracy analog to digital conversion ses linear prediction. An open loop or feed-forward architecture passes an analog signal to a coarse or orthodox analog-to-digital converter that provides digital signals representing a most significant part of the output signal and offers them as inputs to a digital linear predictor whose digital output signal is reconverted to analog form and fed to an analog adder. An analog delay device may be used to receive the next analog sample and, after the proper delay (if needed), feed it to the adder where the difference between the analog predicted value and the analog signal is determined and passed to a subsequent coarse or orthodox analog to digital converter. A closed loop or feedback configuration receives the analog input signal data as well as a feedback predicted value in analog form and passes the difference to a coarse or orthodox analog to digital converter. A digital delay of the digital signal may be used to insure that the digital summing of prediction and digitized error signals occurs at the appropriate times.

US Patent:

39719278, Jul 27, 1976

Filed:

Nov 3, 1975

Appl. No.:

5/628433

Inventors:

Jeffrey M. Speiser - San Diego CA
Herbert M. Federhen - San Diego CA

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

G06G 722
G06F 1534

US Classification:

235186

Abstract:

Apparatus for performing an even discrete cosine transform (EDCT) on an it signal of size 2N, with components for an EDCT of size N, which comprises four similar modules, for performing an extended discrete Fourier transform (EDFT) on their input signals. Each EDFT module comprises means for generating the signal ##EQU1## s = - (N- 1),. . . , (N- 1), an input multiplier, a transversal filter, and an output multiplier. The apparatus further comprises a switching means, means for generating a signal (- 1). sup. n, two input multipliers, two complex attenuators, two other means for generating a signal, four output multipliers, two signal summers, and two circuits for taking the real part of an input signal.

US Patent:

41527720, May 1, 1979

Filed:

Dec 20, 1976

Appl. No.:

5/752641

Inventors:

Jeffrey M. Speiser - San Diego CA
James M. Alsup - San Diego CA

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

G06F 1534
G06G 712

US Classification:

364725

Abstract:

Apparatus for performing a discrete cosine transform of an input signal, table for real-time television image processing, specifically for obtaining an acceptable picture when the number of bits of information available for describing the picture and/or the channel bandwidth are severely limited, comprising: two read-only memories, each containing a predetermined number of +1's and -1's arranged in a predetermined manner; two multipliers, each having an input from one of the read-only memories, and another, joint, input connectable to the input signal which is to be transformed discretely and cosinusoidally; two transversal filters, each having N taps, rather than twice the number (2N-1) of taps in the prior art discrete cosine filters, the input to each filter being the output of one of the multipliers; and a single-pole double-throw switch, which switches position at every shift of the samples through the filter, the output of the transform apparatus being connected to the switch arm, each of the free terminals of the switch being connected to the output of one of the transversal filters.

US Patent:

42825792, Aug 4, 1981

Filed:

Oct 22, 1979

Appl. No.:

6/086967

Inventors:

Jeffrey M. Speiser - San Diego CA
Harper J. Whitehouse - San Diego CA

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

G06F 15332
G06G 712

US Classification:

364726

Abstract:

A transform system provides a real-time implementation of the discrete Foer transform (DFT) of length N, the system being useful in sonar and radar signal processing. The input signal g. sub. n, 0. ltoreq. n. ltoreq. N-1, comprises a discrete signal, generally complex, of N samples. The system comprises an input for receiving the input signal g. sub. n and convolving in a first, input, convolver with a signal represented by the function e. sup. i. pi. n. spsp. 2. sup. /N , to result in a first modified signal at the output of the first convolver. Means are provided for generating the signal e. sup. -i. pi. n. spsp. 2. sup. /N. A multiplier receives the first modified signal and the signal e. sup. -i. pi. n. spsp. 2. sup. /N and multiplies these two signals its output being a second modified signal. A second, output, convolver, whose input is connected to the output of the multiplier, convolves the output signal from the multiplier with a signal represented by the function e. sup. i. pi. n. spsp. 2. sup.

US Patent:

41640233, Aug 7, 1979

Filed:

Sep 22, 1977

Appl. No.:

5/835765

Inventors:

Harper J. Whitehouse - San Diego CA
Jeffrey M. Speiser - San Diego CA

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

G11C 1140
G06G 719

US Classification:

364862

Abstract:

A permutation memory comprises an input control means for decoding, having plurality L of inputs for an L-bit binary number, and a plurality 2. sup. L of outputs. Means are connected to the decoding means, for initiating the read-in of the L-bit number. Means are provided for applying an input signal. A first plurality of 2. sup. L of normally open switching means are connected to the 2. sup. L outputs of the decoding means and to the signal applying means. A plurality of 2. sup. L of means are connected to the switching means, for storing a charge when a specific switching means, connected to a corresponding charge storing means, is in a closed condition. A second plurality 2. sup. L of switching means are connected to the first plurality of switching means and to the charge storing means. An output control means, connected to the second plurality of switching means, reads out the states of the 2. sup.

US Patent:

39653439, Jun 22, 1976

Filed:

Mar 3, 1975

Appl. No.:

5/554875

Inventors:

Jeffrey M. Speiser - San Diego CA
Harper John Whitehouse - San Diego CA

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

G06F 1534

US Classification:

235156

Abstract:

Two kinds of apparatus for combining N. sub. 2 chirp-Z transform (CZT) modu of length N. sub. 1 to perform a discrete Fourier transform (DFT) of length N. sub. 1 N. sub. 2. The first method uses an auxiliary parallel-input, parallel-output, DFT device of size N. sub. 2 and allows the transform of size N. sub. 1 N. sub. 2 to be performed in the same time as is required for a single CZT module to perform a size N. sub. 1 transform. The second method uses an auxiliary parallel-input, serial-output, DFT device of size N. sub. 2. If the second method is implemented entirely in a single technology, such as with charge-coupled devices (CCDs), it performs the size N. sub. 1 N. sub. 2 transform in N. sub. 2 times the amount of time required for a single CZT module to perform a size N. sub. 1 transform. If N. sub.