Jeffrey Dale Walling

US Patent:

20210288136, Sep 16, 2021

Filed:

Mar 12, 2020

Appl. No.:

16/817077

Inventors:

- Salt Lake City UT, US
Ashish Chanana - Salt Lake City UT, US
Steven M. Blair - Salt Lake City UT, US
Vikram Deshpande - Salt Lake City UT, US
Michael A. Scarpulla - Salt Lake City UT, US
Hugo Orlando Condori - Salt Lake City UT, US
Jeffrey Walling - Salt Lake City UT, US

International Classification:

H01L 49/02
H01L 21/02
H01L 21/3105
H01L 21/3205

Abstract:

Ultra-compact inductor devices for use in integrated circuits (e.g., RF ICs) that use 3-dimensional Dirac materials for providing the inductor. Whereas inductors currently require significant real estate on an integrated circuit, because they require use of an electrically conductive winding around an insulative core, or such metal deposited in a spiral geometry, the present devices can be far more compact, occupying significantly less space on an integrated circuit. For example, an ultra-compact inductor that could be included in an integrated circuit may include a 3-dimensional Dirac material formed into a geometric shape capable of inductance (e.g., as simple as a stripe or series of stripes of such material), deposited on a substantially non-conductive (i.e., insulative) substrate, on which the Dirac material in the selected geometric shape is positioned. Low temperature manufacturing methods compatible with CMOS manufacturing are also provided.

US Patent:

20200310482, Oct 1, 2020

Filed:

Mar 20, 2020

Appl. No.:

16/825071

Inventors:

- Salt Lake City UT, US
Jeffrey Walling - Salt Lake City UT, US

International Classification:

G05F 3/24

Abstract:

Embodiments of the disclosure are drawn to voltage reference circuits and methods of designing same. The voltage reference circuit may include a main stage and one or more auxiliary stages. The output of the main stage may be a reference voltage. The auxiliary stages may provide a feedback voltage that reduces a temperature dependence of the reference voltage. Each stage may include two or more transistors. The transistors may operate in a sub-threshold mode to provide the reference voltage.

US Patent:

20200313664, Oct 1, 2020

Filed:

Mar 20, 2020

Appl. No.:

16/825128

Inventors:

- Salt Lake City UT, US
Jeffrey Walling - Salt Lake City UT, US

International Classification:

H03K 7/08
G05F 3/08

Abstract:

Embodiments of the disclosure are drawn to a low-voltage temperature sensor. The temperature sensor may include a waveform generator, a complementary-to-absolute-temperature (CTAT) voltage generator, a voltage reference, two comparators, and digital logic. A waveform of the waveform generator may be compared to both the CTAT voltage and the voltage reference. The output of the comparison of the CTAT and the waveform may be a pulse-width modulated signal that is temperature-dependent. The output of the comparison of the voltage reference and the waveform may be a signal with constant pulse width. The digital logic may receive the pulsed signals and take a ratio of the two signals to determine a temperature.

US Patent:

20200259519, Aug 13, 2020

Filed:

Sep 25, 2018

Appl. No.:

16/651868

Inventors:

Kyle David Holzer - Bountiful UT, US
Jeffrey E. Walling - Salt Lake City UT, US

International Classification:

H04B 1/56
H04B 1/525
H01P 1/38

Abstract:

A full duplex communication system comprises a magnet-less ring circulator that comprises a set of ports extending from a circumference of the magnet-less multi-port ring combiner. The set of ports are positioned at increments around the circumference of the magnet-less multi-port ring combiner.

US Patent:

20200168975, May 28, 2020

Filed:

Jun 5, 2018

Appl. No.:

16/619459

Inventors:

Kyle David HOLZER - Bountiful UT, US
Jeffrey WALLING - Salt Lake City UT, US

International Classification:

H01P 5/19

Abstract:

A magnet-less multi-port ring combiner comprises a set of ports extending from the circumference of the magnet-less multi-port ring combiner. The set of ports are positioned at increments around the circumference of the magnet-less multi-port ring combiner. The set of ports comprise a first input port configured to receive a first input signal and a second input port configured to receive a second input signal, wherein the first input signal is 180 out-of-phase with the second input signal. The N-way magnet-less multi-port combiner comprises more than four ports.

US Patent:

20200169286, May 28, 2020

Filed:

Jul 18, 2018

Appl. No.:

16/632326

Inventors:

Kyle David Holzer - Bountiful UT, US
Jeffrey E. Walling - Salt Lake City UT, US

International Classification:

H04B 1/44
H03F 3/21
H01P 5/22

Abstract:

An electronic switch for switching between signal outputs comprises a 6-way symmetric hybrid ring combiner. Each port within the 6-way symmetric hybrid ring combiner is positioned at λ/4 wavelength increments around a circumference of the 6-way symmetric hybrid ring combiner.