Jennifer A Mckeown

US Patent:

6418489, Jul 9, 2002

Filed:

Jan 18, 2000

Appl. No.:

09/488368

Inventors:

Kristen L. Mason - Austin TX
Gary R. Morrison - Austin TX
Jeffrey M. Polega - Austin TX
Donald L. Tietjen - Austin TX
Frank C. Galloway - Dripping Springs TX
Charles Edward Nuckolls - Austin TX
Jennifer L. McKeown - Austin TX
Robert Bradford Cohen - Austin TX

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

G06F 1328

US Classification:

710 22, 710 54, 710266, 711100, 711105, 711169

Abstract:

Direct memory access controller (DMA) ( ) adapted to directly execute C language style FOR tasks, where the FOR task includes a movement of a data element from a first location to a second location in memory, and the movement is controlled by a master DMA engine (MDE) ( ). A master DMA engine (MDE) ( ) includes a top level state machine ( ) to coordinate a context save state machine ( ), a parse state machine ( ), and a running state machine ( ). An loop control descriptor (LCD) queue ( ) and a data routing descriptor (DRD) cache store information. The LCD queue allows pipelining of descriptor parsing, while the DRD cache avoids refetching of DRDs on reentry of loops.

US Patent:

6421744, Jul 16, 2002

Filed:

Oct 25, 1999

Appl. No.:

09/426009

Inventors:

Gary R. Morrison - Austin TX
Kristen L. Mason - Austin TX
Frank C. Galloway - Dripping Springs TX
Charles E. Nuckolls - Austin TX
Jennifer L. McKeown - Austin TX
Jeffrey M. Polega - Austin TX
Donald L. Tietjen - Austin TX

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

G06F 928

US Classification:

710 22, 710 68, 710 23, 710 31, 710 33, 711148, 711162, 711202

Abstract:

Direct memory access controller (DMAC) ( ) adapted to directly execute C language style FOR tasks assigned by a processor ( ), where the FOR task includes a movement of a data element from a first location to a second location in memory. The DMAC includes multiple execution units (EUs) ( ), each to perform an arithmetic or logical operation, and a FOR task controller ( ) to perform the data movement. The FOR task controller selects the operation to be performed by the EU. In one embodiment, the FOR task is made up of C language type FOR loops, where descriptors identify the control and body of the loop. The descriptors identify the source of operands for an EU, and the source may be changed within a FOR task. A descriptor specifies a function code for an EU and may specify multiple sets of operands for the EU.

US Patent:

6675235, Jan 6, 2004

Filed:

Jan 18, 2000

Appl. No.:

09/488363

Inventors:

Frank C. Galloway - Dripping Springs TX
Kristen L. Mason - Austin TX
Gary R. Morrison - Austin TX
Charles Edward Nuckolls - Austin TX
Jennifer L. McKeown - Austin TX

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

G06F 1314

US Classification:

710 29, 712209, 712210, 364200

Abstract:

An execution unit ( ) interface protocol allowing flow-through of data, where a function is specified once and the execution unit performs the function for multiple sets of input data. Function execution is pipelined through the execution unit, where an input unit ( ) stores information, while a function logic unit ( ) processes data and an output unit ( ) holds results to be output. The execution unit ( ) allows for data rate distortion, in applications such as data compression, where the amount of data received is different from the amount of data generated as output.